NetBSD Problem Report #57680
From tsutsui@ceres.dti.ne.jp Wed Nov 1 19:16:12 2023
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by mollari.NetBSD.org (Postfix) with ESMTPS id D40F01A9238
for <gnats-bugs@gnats.NetBSD.org>; Wed, 1 Nov 2023 19:16:12 +0000 (UTC)
Message-Id: <202311011916.3A1JG5Ar021230@ceres.dti.ne.jp>
Date: Thu, 2 Nov 2023 04:16:05 +0900 (JST)
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Reply-To: tsutsui@ceres.dti.ne.jp
To: gnats-bugs@NetBSD.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: printf("%.1f") shows wrong results on R3000 mipseb
X-Send-Pr-Version: 3.95
>Number: 57680
>Category: port-mips
>Synopsis: printf("%.1f") shows wrong results on R3000 mipseb
>Confidential: no
>Severity: serious
>Priority: medium
>Responsible: tsutsui
>State: closed
>Class: sw-bug
>Submitter-Id: net
>Arrival-Date: Wed Nov 01 19:20:00 +0000 2023
>Closed-Date: Tue Nov 28 01:48:49 +0000 2023
>Last-Modified: Tue Nov 28 01:48:49 +0000 2023
>Originator: Izumi Tsutsui
>Release: NetBSD 9.3
>Organization:
>Environment:
System: NetBSD galant 9.3_STABLE NetBSD 9.3_STABLE (GENERIC) #9: Sun Oct 29 06:09:59 JST 2023 tsutsui@mirage:/s/netbsd-9/src/sys/arch/newsmips/compile/GENERIC newsmips (userland binaries are from NetBSD 9.3 release)
Architecture: mipseb
Machine: mipseb
>Description:
On NetBSD/newsmips 9.3 on NWS-3470 (maybe also other R3000 machines)
printf with "%.1f" shows wrong results.
>How-To-Repeat:
news3470-% uname -pr
9.3_STABLE mipseb
news3470-% file /usr/bin/cc
/usr/bin/cc: ELF 32-bit MSB pie executable, MIPS, MIPS-I version 1 (SYSV), dynamically linked, interpreter /usr/libexec/ld.elf_so, for NetBSD 9.3, not stripped
news3470-% cc --version
cc (nb4 20200810) 7.5.0
Copyright (C) 2017 Free Software Foundation, Inc.
This is free software; see the source for copying conditions. There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
news3470-% ps aux
USER PID %CPU %MEM VSZ RSS TTY STAT STARTED TIME COMMAND
root 18704 _.0 1.0 6484 1188 ? R 3:56AM 7:28.92 find / ( ! -fs
tsutsui 15542 C.0 2.0 6768 1320 pts/0 O+ 4:10AM 0:00.67 ps -aux
root 0 ;.0 4.0 0 2968 ? DKl Tue01AM 124:22.81 [system]
root 541 0.E 0.5 7004 328 ? S Tue07PM 8:49.04 rlogind -L
root 1 0.0 0.0 6636 0 ? Is Tue01AM 0:01.04 init
root 173 0.0 1.0 11668 740 ? Ss Tue01AM 0:20.59 /usr/sbin/sysl
:
news3470-% cat test.c
#include <stdio.h>
int
main(int argc, char *argv[])
{
float f;
f = 3.14159 * 100;
printf("%.1f\n", f);
printf("%d\n", (int)f);
f = f * 5;
printf("%.1f\n", f);
printf("%d\n", (int)f);
}
news3470-% cc test.c
news3470-% ./a.out
300.0
314
?00.0
1570
news3470-%
>Fix:
Unknown.
If it works on MIPS3 machines or emulators, there are
some hazard problems in asm sources?
---
Izumi Tsutsui
>Release-Note:
>Audit-Trail:
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: gnats-bugs@netbsd.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000 mipseb
Date: Fri, 3 Nov 2023 14:37:55 +0900
> >Description:
> On NetBSD/newsmips 9.3 on NWS-3470 (maybe also other R3000 machines)
> printf with "%.1f" shows wrong results.
>
> >How-To-Repeat:
:
> news3470-% cat test.c
> #include <stdio.h>
>
> int
> main(int argc, char *argv[])
> {
> float f;
>
> f = 3.14159 * 100;
> printf("%.1f\n", f);
> printf("%d\n", (int)f);
>
> f = f * 5;
> printf("%.1f\n", f);
> printf("%d\n", (int)f);
> }
> news3470-% cc test.c
> news3470-% ./a.out
> 300.0
> 314
> ?00.0
> 1570
> news3470-%
The news3470 has R3000 and R3010 FPU:
---
news3470-% grep ^cpu0 /var/run/dmesg.boot
cpu0 at mainbus0: MIPS R3000 CPU (0x220) Rev. 2.0 with MIPS R3010 FPC Rev. 2.0
cpu0: 64KB/4B direct-mapped Instruction cache, 64 TLB entries
cpu0: 64KB/4B direct-mapped write-through Data cache
---
I've also tested on R4400 NWS-5000 and it works without problem:
---
news5000-% uname -a
NetBSD vrfour 9.3 NetBSD 9.3 (GENERIC) #0: Thu Aug 4 15:30:37 UTC 2022 mkrepro@mkrepro.NetBSD.org:/usr/src/sys/arch/newsmips/compile/GENERIC newsmips
news5000-% grep ^cpu0 /var/run/dmesg.boot
cpu0 at mainbus0: MIPS R4400 CPU (0x450) Rev. 5.0 with MIPS R4010 FPC Rev. 0.0
cpu0: 48 TLB entries, 16MB max page size
cpu0: 16KB/16B direct-mapped L1 instruction cache
cpu0: 16KB/16B direct-mapped write-back L1 data cache
cpu0: 1024KB/64B direct-mapped write-back L2 unified cache
news5000-% cat test.c
#include <stdio.h>
int
main(int argc, char *argv[])
{
float f;
f = 3.14159 * 100;
printf("%.1f\n", f);
printf("%d\n", (int)f);
f = f * 5;
printf("%.1f\n", f);
printf("%d\n", (int)f);
}
news5000-% cc test.c
news5000-% ./a.out
314.2
314
1570.8
1570
news5000-%
---
So the results imply this problem is R3000 (MIPS1) specific.
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: gnats-bugs@netbsd.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000 mipseb
Date: Fri, 3 Nov 2023 17:08:52 +0900
It looks something wrong in libc.so.12.213 from NetBSD 9.3.
The same binary with libc.so.12.207 from NetBSD 8.2 works as expected.
---
# file ./a.out
./a.out: ELF 32-bit MSB executable, MIPS, MIPS-I version 1 (SYSV), dynamically linked, interpreter /usr/libexec/ld.elf_so, for NetBSD 9.3, not stripped
# file /lib/libc.so.12.213
/lib/libc.so.12.213: ELF 32-bit MSB shared object, MIPS, MIPS-I version 1 (SYSV), dynamically linked, for NetBSD 9.3, not stripped
# ./a.out
300.0
314
?00.0
1570
# chroot .
# file /lib/libc.so.12.207
/lib/libc.so.12.207: ELF 32-bit MSB shared object, MIPS, MIPS-I version 1 (SYSV), dynamically linked, for NetBSD 8.2, not stripped
# ./a.out
314.2
314
1570.8
1570
#
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: gnats-bugs@netbsd.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000 mipseb
Date: Fri, 3 Nov 2023 18:44:37 +0900
> It looks something wrong in libc.so.12.213 from NetBSD 9.3.
> The same binary with libc.so.12.207 from NetBSD 8.2 works as expected.
>
> ---
> # file ./a.out
> ./a.out: ELF 32-bit MSB executable, MIPS, MIPS-I version 1 (SYSV), dynamically linked, interpreter /usr/libexec/ld.elf_so, for NetBSD 9.3, not stripped
> # file /lib/libc.so.12.213
> /lib/libc.so.12.213: ELF 32-bit MSB shared object, MIPS, MIPS-I version 1 (SYSV), dynamically linked, for NetBSD 9.3, not stripped
> # ./a.out
> 300.0
> 314
> ?00.0
> 1570
The same binary with libc.so.12.213 (in netbsd-9 src) built using
netbsd-8 toolchain (i.e. gcc 5.5.0) shows:
---
# ./a.out
0.0
314
0000000001570.8
1570
#
---
Izumi Tsutsui
From: Simon Burge <simonb@NetBSD.org>
To: gnats-bugs@netbsd.org
Cc: port-mips-maintainer@netbsd.org, gnats-admin@netbsd.org,
netbsd-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000 mipseb
Date: Fri, 03 Nov 2023 21:29:41 +1100
Hi Tsutsui,
Izumi Tsutsui wrote:
> The same binary with libc.so.12.213 (in netbsd-9 src) built using
> netbsd-8 toolchain (i.e. gcc 5.5.0) shows:
> ---
> # ./a.out
> 0.0
> 314
> 0000000001570.8
> 1570
> #
Good work digging around. You've now narrowed this down to a gcc
7.5.0 problem then?
Cheers,
Simon.
From: RVP <rvp@SDF.ORG>
To: gnats-bugs@netbsd.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000
mipseb
Date: Fri, 3 Nov 2023 10:32:18 +0000 (UTC)
On Fri, 3 Nov 2023, Izumi Tsutsui wrote:
> It looks something wrong in libc.so.12.213 from NetBSD 9.3.
> The same binary with libc.so.12.207 from NetBSD 8.2 works as expected.
>
> ---
> # file ./a.out
> ./a.out: ELF 32-bit MSB executable, MIPS, MIPS-I version 1 (SYSV), dynamically linked, interpreter /usr/libexec/ld.elf_so, for NetBSD 9.3, not stripped
> # file /lib/libc.so.12.213
> /lib/libc.so.12.213: ELF 32-bit MSB shared object, MIPS, MIPS-I version 1 (SYSV), dynamically linked, for NetBSD 9.3, not stripped
> # ./a.out
> 300.0
> 314
> ?00.0
> 1570
> # chroot .
> # file /lib/libc.so.12.207
> /lib/libc.so.12.207: ELF 32-bit MSB shared object, MIPS, MIPS-I version 1 (SYSV), dynamically linked, for NetBSD 8.2, not stripped
> # ./a.out
> 314.2
> 314
> 1570.8
> 1570
> #
>
> ---
>
Can you show the output of this program? (Instructions in source)
```
/**
* Little-Endian 32-bit:
* cc -I/usr/src/lib/libc/gdtoa/ -I/usr/src/lib/libc/arch/i386/gdtoa/ \
* -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m \
* m.c /usr/src/lib/libc/gdtoa/dtoa.c /usr/src/lib/libc/gdtoa/dmisc.c
*
* Big-Endian 32-bit:
* cc -I/usr/src/lib/libc/gdtoa/ -I/usr/src/lib/libc/arch/mips/gdtoa/ \
* -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m \
* m.c /usr/src/lib/libc/gdtoa/dtoa.c /usr/src/lib/libc/gdtoa/dmisc.c
*/
#include <stdio.h>
char* __dtoa(double d0, int mode, int ndigits, int *decpt, int *sign, char **rve);
static void
pr_f(char* s, int pt, int neg)
{
if (s == NULL)
return;
if (pt < 0 || pt == 9999) /* XXX: unhandled */
return;
printf("%s", neg ? "-" : "");
printf("%.*s.", pt, s);
printf("%.1s\n", s + pt);
}
int
main(int argc, char *argv[])
{
int pt, neg;
char* p, *s;
union {
unsigned int i;
float f;
} u;
u.f = 3.14159;
s = __dtoa(u.f, 3, 6, &pt, &neg, NULL);
pr_f(s, pt, neg);
printf("%08X\n", u.i);
u.f = u.f * 100;
s = __dtoa(u.f, 3, 6, &pt, &neg, NULL);
pr_f(s, pt, neg);
printf("%08X\n", u.i);
u.f = u.f * 5;
s = __dtoa(u.f, 3, 6, &pt, &neg, NULL);
pr_f(s, pt, neg);
printf("%08X\n", u.i);
}
```
-RVP
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: simonb@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000 mipseb
Date: Fri, 3 Nov 2023 20:20:23 +0900
> Good work digging around. You've now narrowed this down to a gcc
> 7.5.0 problem then?
No, by git bisect, it turns out gdtoa problem.
(I'll post it in a separate mail)
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rvp@SDF.ORG
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Fri, 3 Nov 2023 20:25:27 +0900
> Can you show the output of this program? (Instructions in source)
>
> ```
> /**
> * Little-Endian 32-bit:
> * cc -I/usr/src/lib/libc/gdtoa/ -I/usr/src/lib/libc/arch/i386/gdtoa/ \
> * -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m \
> * m.c /usr/src/lib/libc/gdtoa/dtoa.c /usr/src/lib/libc/gdtoa/dmisc.c
> *
> * Big-Endian 32-bit:
> * cc -I/usr/src/lib/libc/gdtoa/ -I/usr/src/lib/libc/arch/mips/gdtoa/ \
> * -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m \
> * m.c /usr/src/lib/libc/gdtoa/dtoa.c /usr/src/lib/libc/gdtoa/dmisc.c
> */
I have not tried this yet, but git bisect shows
the following pullup [netbsd-9 #506] caused this problem:
https://mail-index.netbsd.org/source-changes/2019/12/08/msg111698.html
https://github.com/NetBSD/src/commit/87f7bda
---
diff --git a/lib/libc/gdtoa/Makefile.inc b/lib/libc/gdtoa/Makefile.inc
index 19268daa9148..b8bb0a51d464 100644
--- a/lib/libc/gdtoa/Makefile.inc
+++ b/lib/libc/gdtoa/Makefile.inc
@@ -1,10 +1,14 @@
-# $NetBSD: Makefile.inc,v 1.10 2014/01/16 20:31:42 christos Exp $
+# $NetBSD: Makefile.inc,v 1.10.28.1 2019/12/08 13:35:51 martin Exp $
# gdtoa sources
.PATH: ${.CURDIR}/gdtoa
CPPFLAGS+=-I${.CURDIR}/gdtoa -I${.CURDIR}/locale
+.if ${MACHINE_ARCH} == "vax"
CPPFLAGS+=-DNO_FENV_H
+.else
+CPPFLAGS+=-DHonor_FLT_ROUNDS
+.endif
# machine-dependent directory must provide the following:
# arith.h gd_qnan.h
diff --git a/lib/libc/gdtoa/gdtoa_fltrnds.h b/lib/libc/gdtoa/gdtoa_fltrnds.h
index 33e5f9e5342c..f170de5fd158 100644
--- a/lib/libc/gdtoa/gdtoa_fltrnds.h
+++ b/lib/libc/gdtoa/gdtoa_fltrnds.h
@@ -1,4 +1,5 @@
- FPI *fpi, fpi1;
+ CONST FPI *fpi;
+ FPI fpi1;
int Rounding;
#ifdef Trust_FLT_ROUNDS /*{{ only define this if FLT_ROUNDS really works! */
Rounding = Flt_Rounds;
diff --git a/lib/libc/gdtoa/gdtoaimp.h b/lib/libc/gdtoa/gdtoaimp.h
index 32a1bad59be0..f1d1de0f24b3 100644
--- a/lib/libc/gdtoa/gdtoaimp.h
+++ b/lib/libc/gdtoa/gdtoaimp.h
@@ -1,4 +1,4 @@
-/* $NetBSD: gdtoaimp.h,v 1.14 2013/04/19 10:41:53 joerg Exp $ */
+/* $NetBSD: gdtoaimp.h,v 1.14.30.1 2019/12/08 13:35:51 martin Exp $ */
/****************************************************************
@@ -200,6 +200,10 @@ THIS SOFTWARE.
#include "gd_qnan.h"
#ifdef Honor_FLT_ROUNDS
#include <fenv.h>
+__unused __weakref_visible int __libc_fegetround_ref(void)
+ __weak_reference(fegetround);
+#define fegetround() \
+ (__libc_fegetround_ref ? __libc_fegetround_ref() : FE_TONEAREST)
#endif
#ifdef DEBUG
---
Actually disabling "-DHonor_FLT_ROUNDS" on mips (especially on R3010?)
works around.
---
diff --git a/lib/libc/gdtoa/Makefile.inc b/lib/libc/gdtoa/Makefile.inc
index b8bb0a51d464..a4c42d0ef269 100644
--- a/lib/libc/gdtoa/Makefile.inc
+++ b/lib/libc/gdtoa/Makefile.inc
@@ -4,7 +4,8 @@
.PATH: ${.CURDIR}/gdtoa
CPPFLAGS+=-I${.CURDIR}/gdtoa -I${.CURDIR}/locale
-.if ${MACHINE_ARCH} == "vax"
+.if ${MACHINE_ARCH} == "vax" || \
+ ${MACHINE_CPU} == "mips"
CPPFLAGS+=-DNO_FENV_H
.else
CPPFLAGS+=-DHonor_FLT_ROUNDS
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rvp@SDF.ORG
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Fri, 3 Nov 2023 20:38:45 +0900
> > Can you show the output of this program? (Instructions in source)
> >
> > ```
> > /**
> > * Little-Endian 32-bit:
> > * cc -I/usr/src/lib/libc/gdtoa/ -I/usr/src/lib/libc/arch/i386/gdtoa/ \
> > * -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m \
> > * m.c /usr/src/lib/libc/gdtoa/dtoa.c /usr/src/lib/libc/gdtoa/dmisc.c
> > *
> > * Big-Endian 32-bit:
> > * cc -I/usr/src/lib/libc/gdtoa/ -I/usr/src/lib/libc/arch/mips/gdtoa/ \
> > * -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m \
> > * m.c /usr/src/lib/libc/gdtoa/dtoa.c /usr/src/lib/libc/gdtoa/dmisc.c
> > */
>
> I have not tried this yet, but git bisect shows
Now I've tried it on both NWS-3470 (R3000 + R3010) and NWS-5000 (R4400):
On NWS-3470:
---
news3470-% cc -I/s/netbsd-9/src/lib/libc/gdtoa/ -I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa/ -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m m.c /s/netbsd-9/src/lib/libc/gdtoa/gdtoa.c /s/netbsd-9/src/lib/libc/gdtoa/dmisc.c
news3470-% ./m
.O
40490FD0
3.0
439D145A
?.0
44C45970
news3470-% grep ^cpu0 /var/run/dmesg.boot
cpu0 at mainbus0: MIPS R3000 CPU (0x220) Rev. 2.0 with MIPS R3010 FPC Rev. 2.0
cpu0: 64KB/4B direct-mapped Instruction cache, 64 TLB entries
cpu0: 64KB/4B direct-mapped write-through Data cache
news3470-%
---
On NWS-5000:
---
(copy the above "m" binary from NWS-3470)
news5000-% ./m
3.1
40490FD0
314.1
439D145A
1570.7
44C45970
news5000-% % grep ^cpu0 /var/run/dmesg.boot
cpu0 at mainbus0: MIPS R4400 CPU (0x450) Rev. 5.0 with MIPS R4010 FPC Rev. 0.0
cpu0: 48 TLB entries, 16MB max page size
cpu0: 16KB/16B direct-mapped L1 instruction cache
cpu0: 16KB/16B direct-mapped write-back L1 data cache
cpu0: 1024KB/64B direct-mapped write-back L2 unified cache
news5000-%
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: gnats-bugs@netbsd.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Fri, 3 Nov 2023 21:43:51 +0900
> --- a/lib/libc/gdtoa/Makefile.inc
> +++ b/lib/libc/gdtoa/Makefile.inc
> @@ -4,7 +4,8 @@
> .PATH: ${.CURDIR}/gdtoa
> CPPFLAGS+=-I${.CURDIR}/gdtoa -I${.CURDIR}/locale
>
> -.if ${MACHINE_ARCH} == "vax"
> +.if ${MACHINE_ARCH} == "vax" || \
> + ${MACHINE_CPU} == "mips"
> CPPFLAGS+=-DNO_FENV_H
> .else
> CPPFLAGS+=-DHonor_FLT_ROUNDS
>
> ---
The following change also makes printf "%.1f" work
on NWS-3470 (R3000+R3010):
---
--- a/lib/libc/gdtoa/gdtoaimp.h
+++ b/lib/libc/gdtoa/gdtoaimp.h
@@ -202,8 +202,12 @@ THIS SOFTWARE.
#include <fenv.h>
__unused __weakref_visible int __libc_fegetround_ref(void)
__weak_reference(fegetround);
+#if 0
#define fegetround() \
(__libc_fegetround_ref ? __libc_fegetround_ref() : FE_TONEAREST)
+#else
+#define fegetround() FE_TOWARDZERO
+#endif
#endif
#ifdef DEBUG
---
MIPS1 (R3010) has a different default round mode?
---
Izumi Tsutsui
From: RVP <rvp@SDF.ORG>
To: gnats-bugs@netbsd.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on
R3000mipseb
Date: Fri, 3 Nov 2023 12:49:55 +0000 (UTC)
On Fri, 3 Nov 2023, Izumi Tsutsui wrote:
> Now I've tried it on both NWS-3470 (R3000 + R3010) and NWS-5000 (R4400):
>
> On NWS-3470:
> ---
> news3470-% cc -I/s/netbsd-9/src/lib/libc/gdtoa/ -I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa/ -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m m.c /s/netbsd-9/src/lib/libc/gdtoa/gdtoa.c /s/netbsd-9/src/lib/libc/gdtoa/dmisc.c
> news3470-% ./m
> .O
> 40490FD0
> 3.0
> 439D145A
> ?.0
> 44C45970
> news3470-% grep ^cpu0 /var/run/dmesg.boot
> cpu0 at mainbus0: MIPS R3000 CPU (0x220) Rev. 2.0 with MIPS R3010 FPC Rev. 2.0
> cpu0: 64KB/4B direct-mapped Instruction cache, 64 TLB entries
> cpu0: 64KB/4B direct-mapped write-through Data cache
> news3470-%
> ---
>
> On NWS-5000:
> ---
> (copy the above "m" binary from NWS-3470)
> news5000-% ./m
> 3.1
> 40490FD0
> 314.1
> 439D145A
> 1570.7
> 44C45970
> news5000-% % grep ^cpu0 /var/run/dmesg.boot
> cpu0 at mainbus0: MIPS R4400 CPU (0x450) Rev. 5.0 with MIPS R4010 FPC Rev. 0.0
> cpu0: 48 TLB entries, 16MB max page size
> cpu0: 16KB/16B direct-mapped L1 instruction cache
> cpu0: 16KB/16B direct-mapped write-back L1 data cache
> cpu0: 1024KB/64B direct-mapped write-back L2 unified cache
> news5000-%
>
> ---
> Izumi Tsutsui
>
Interesting. The _same_ binary behaves differently. Rules out a compiler bug
--well, almost.
Can you try a new binary with /usr/src/lib/libc/gdtoa/misc.c compiled in as
well:
cc -I/usr/src/lib/libc/gdtoa/ -I/usr/src/lib/libc/arch/mips/gdtoa/ \
-DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m m.c \
/usr/src/lib/libc/gdtoa/dtoa.c \
/usr/src/lib/libc/gdtoa/dmisc.c \
/usr/src/lib/libc/gdtoa/misc.c
This way, the resulting binary won't pickup _any_ gdtoa funcs. from libc.
(Previously, the stuff in misc.c came from the libc on the running machine
which may have been optimized.)
-RVP
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rvp@SDF.ORG
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results onR3000mipseb
Date: Fri, 3 Nov 2023 22:44:47 +0900
> Interesting. The _same_ binary behaves differently. Rules out a compiler bug
> --well, almost.
>
> Can you try a new binary with /usr/src/lib/libc/gdtoa/misc.c compiled in as
> well:
>
> cc -I/usr/src/lib/libc/gdtoa/ -I/usr/src/lib/libc/arch/mips/gdtoa/ \
> -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m m.c \
> /usr/src/lib/libc/gdtoa/dtoa.c \
> /usr/src/lib/libc/gdtoa/dmisc.c \
> /usr/src/lib/libc/gdtoa/misc.c
>
> This way, the resulting binary won't pickup _any_ gdtoa funcs. from libc.
> (Previously, the stuff in misc.c came from the libc on the running machine
> which may have been optimized.)
Ah, sorry, I specified a wrong source (not dtoa.c but gdtoa.c)..
>> > news3470-% cc -I/s/netbsd-9/src/lib/libc/gdtoa/ -I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa/ -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m m.c /s/netbsd-9/src/lib/libc/gdtoa/gdtoa.c /s/netbsd-9/src/lib/libc/gdtoa/dmisc.c
I've also tried again with misc settings:
On NWS-3470:
---
news3470-% grep ^cpu /var/run/dmesg.boot
cpu0 at mainbus0: MIPS R3000 CPU (0x220) Rev. 2.0 with MIPS R3010 FPC Rev. 2.0
cpu0: 64KB/4B direct-mapped Instruction cache, 64 TLB entries
cpu0: 64KB/4B direct-mapped write-through Data cache
news3470-% cc -I/s/netbsd-9/src/lib/libc/gdtoa/ -I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa/ -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m0 m.c /s/netbsd-9/src/lib/libc/gdtoa/gdtoa.c /s/netbsd-9/src/lib/libc/gdtoa/dmisc.c
news3470-% cc -I/s/netbsd-9/src/lib/libc/gdtoa/ -I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa/ -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m m.c /s/netbsd-9/src/lib/libc/gdtoa/dtoa.c /s/netbsd-9/src/lib/libc/gdtoa/dmisc.c
news3470-% cc -I/s/netbsd-9/src/lib/libc/gdtoa/ -I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa/ -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m2 m.c /s/netbsd-9/src/lib/libc/gdtoa/dtoa.c /s/netbsd-9/src/lib/libc/gdtoa/dmisc.c /s/netbsd-9/src/lib/libc/gdtoa/misc.c
news3470-% cc -O2 -I/s/netbsd-9/src/lib/libc/gdtoa/ -I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa/ -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m2-O2 m.c /s/netbsd-9/src/lib/libc/gdtoa/dtoa.c /s/netbsd-9/src/lib/libc/gdtoa/dmisc.c /s/netbsd-9/src/lib/libc/gdtoa/misc.c
news3470-% ./m0
.O
40490FD0
3.0
439D145A
?.0
44C45970
news3470-% ./m
3.1
40490FD0
314.1
439D145A
1570.7
44C45970
news3470-% ./m2
3.1
40490FD0
314.1
439D145A
1570.7
44C45970
news3470-% ./m2-O2
.O
40490FD0
3*5.8
439D145A
?*8.7
44C45970
news3470-%
---
(the above '*'s are 8bit Japanese "katakana" chars)
On NWS-5000:
---
(copy all binaries from the above NWS-3470)
news5000-% grep ^cpu /var/run/dmesg.boot
cpu0 at mainbus0: MIPS R4400 CPU (0x450) Rev. 5.0 with MIPS R4010 FPC Rev. 0.0
cpu0: 48 TLB entries, 16MB max page size
cpu0: 16KB/16B direct-mapped L1 instruction cache
cpu0: 16KB/16B direct-mapped write-back L1 data cache
cpu0: 1024KB/64B direct-mapped write-back L2 unified cache
news5000-% ./m0
3.1
40490FD0
314.1
439D145A
1570.7
44C45970
news5000-% ./m
3.1
40490FD0
314.1
439D145A
1570.7
44C45970
news5000-% ./m2
3.1
40490FD0
314.1
439D145A
1570.7
44C45970
news5000-% ./m2-O2
3.1
40490FD0
314.1
439D145A
1570.7
44C45970
news5000-%
---
So at least gcc -O2 (including dtoa.c in libc.so) causes
something wrong on MIPS1.
(I still wonder if it's compiler bug or improper implementation like
undefined behaviour etc.)
---
Izumi Tsutsui
From: RVP <rvp@SDF.ORG>
To: gnats-bugs@netbsd.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results
onR3000mipseb
Date: Fri, 3 Nov 2023 23:35:20 +0000 (UTC)
On Fri, 3 Nov 2023, Izumi Tsutsui wrote:
> So at least gcc -O2 (including dtoa.c in libc.so) causes
> something wrong on MIPS1.
>
Very intriguing results! Does adding an explicit arch flag like `-march=mips1'
along with `-O2' help?
> (I still wonder if it's compiler bug or improper implementation like
> undefined behaviour etc.)
>
I don't know anything about the MIPS arch. so I can't definitively say, but,
IMO I think it's the code GCC is generating for MIPS1:
a) One of the first things I tried on a recent 9.3_STABLE running on amd64
was to try out different FE_* rounding modes--just like what you added.
Compile with: cc -m32 -O2 -ffast-math (this last sometimes causes problems).
No issues.
b) Next I forced the FPU to do the rounding by calling fesetround(FE_*) first
thing. This made some of the final bits in the precision differ, but, this
is expected.
c) The same binaries work on the newer MIPS arches.
d) You say it works fine in an emulator.
-RVP
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rvp@SDF.ORG
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sat, 4 Nov 2023 12:12:53 +0900
> On Fri, 3 Nov 2023, Izumi Tsutsui wrote:
>
> > So at least gcc -O2 (including dtoa.c in libc.so) causes
> > something wrong on MIPS1.
> >
>
> Very intriguing results! Does adding an explicit arch flag like `-march=mips1'
> along with `-O2' help?
Looks no change:
---
news3470-% uname -a
NetBSD galant 9.3 NetBSD 9.3 (GENERIC) #0: Sat Nov 4 02:48:54 JST 2023 tsutsui@mirage:/s/tsutsui/netbsd-src/sys/arch/newsmips/compile/obj.newsmips/GENERIC newsmips
news3470-% sysctl hw.model
hw.model = news3400
news3470-% grep ^cpu /var/run/dmesg.boot
cpu0 at mainbus0: MIPS R3000 CPU (0x220) Rev. 2.0 with MIPS R3010 FPC Rev. 2.0
cpu0: 64KB/4B direct-mapped Instruction cache, 64 TLB entries
cpu0: 64KB/4B direct-mapped write-through Data cache
news3470-% cc -O2 -march=mips1 -I/s/netbsd-9/src/lib/libc/gdtoa/ -I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa/ -DDEBUG -DHonor_FLT_ROUNDS -DNO_LONG_LONG -o m2-O2-mips1 m.c /s/netbsd-9/src/lib/libc/gdtoa/dtoa.c /s/netbsd-9/src/lib/libc/gdtoa/dmisc.c /s/netbsd-9/src/lib/libc/gdtoa/misc.c
news3470-% ./m2-O2-mips1
.O
40490FD0
3*5.8
439D145A
?*8.7
44C45970
news3470-%
---
('*'s are also non US-ASCII 8bit chars)
>
> > (I still wonder if it's compiler bug or improper implementation like
> > undefined behaviour etc.)
> >
>
> I don't know anything about the MIPS arch. so I can't definitively say, but,
> IMO I think it's the code GCC is generating for MIPS1:
>
> a) One of the first things I tried on a recent 9.3_STABLE running on amd64
> was to try out different FE_* rounding modes--just like what you added.
> Compile with: cc -m32 -O2 -ffast-math (this last sometimes causes problems).
>
> No issues.
>
> b) Next I forced the FPU to do the rounding by calling fesetround(FE_*) first
> thing. This made some of the final bits in the precision differ, but, this
> is expected.
Yes, using FE_TOWARDZERO as default works around on NWS-3470 (R3000+R3010).
> c) The same binaries work on the newer MIPS arches.
Yes, at least on NWS-5000 (R4400 mipseb).
> d) You say it works fine in an emulator.
I've also confirmed on NetBSD/pmax 9.3 on GXemul emulating
DECstation5000/200 (3MAX) R3000:
https://gist.github.com/tsutsui/043243066bb77f3f0315c70b53269192
https://user-images.githubusercontent.com/3054480/280441532-81e27faf-1e5b-4bee-a9a1-170e8ded09ea.png
---
Unless some MIPS guru has proper idea how this issue should be fixed,
I'd like to commit workaround fix to disable -DHonor_FLT_ROUNDS in
src/lib/libc/gdtoa/Makefile.inc in ${MACHINE_CPU}=="mips" case.
Thanks,
---
Izumi Tsutsui
From: Rin Okuyama <rokuyama.rk@gmail.com>
To: gnats-bugs@netbsd.org, port-mips-maintainer@netbsd.org,
gnats-admin@netbsd.org, netbsd-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Cc:
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sat, 4 Nov 2023 12:45:05 +0900
Hi,
On 2023/11/04 12:15, Izumi Tsutsui wrote:
> Unless some MIPS guru has proper idea how this issue should be fixed,
> I'd like to commit workaround fix to disable -DHonor_FLT_ROUNDS in
> src/lib/libc/gdtoa/Makefile.inc in ${MACHINE_CPU}=="mips" case.
(1) How about -current or netbsd-10, which have GCC 10.5?
Less likely, but if this is a temporal problem for specific
versions of GCC, we can restrict the workaround to netbsd-9.
(2) Can we exclude ``mipsn{,64}e[bl]''? -current and netbsd-10 have
${MACHINE_MIPS64} macro for this purpose, but netbsd-9 does not :(
Thanks,
rin
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rokuyama.rk@gmail.com
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sat, 4 Nov 2023 19:16:30 +0900
> > Unless some MIPS guru has proper idea how this issue should be fixed,
> > I'd like to commit workaround fix to disable -DHonor_FLT_ROUNDS in
> > src/lib/libc/gdtoa/Makefile.inc in ${MACHINE_CPU}=="mips" case.
>
> (1) How about -current or netbsd-10, which have GCC 10.5?
>
> Less likely, but if this is a temporal problem for specific
> versions of GCC, we can restrict the workaround to netbsd-9.
I have not tried it, but last time I tried netbsd-10 kernel
on NWS-3260 it was very unstable and looked lost software interrupts
many times, so I'm currently testing NWS-3260 on netbsd-9.
I doubt this problem was really compiler issue and
I wonder if it's okay to assume "FE_TONEAREST" is default
because FE_TOZERO works.
> (2) Can we exclude ``mipsn{,64}e[bl]''? -current and netbsd-10 have
> ${MACHINE_MIPS64} macro for this purpose, but netbsd-9 does not :(
What's your motivation?
Performance? If so, is it visible or measurable?
Consistency? If so, is there any rationale of Honor_FLT_ROUNDS
implementation? Actually we already have an exception (vax).
If you have a working patch to achive your intention in both
HEAD and release branches, it's fine. If not, sorry I don't
have motivation to prepare such complexities.
I'm trying to fix visible issue (and real problems like invalid
strings stored in /etc/ntp.conf etc.). If you want possible
performace or design consistency, it should be measured or
defined by people who want it, because we are on Tier-II ports
"keeping it working is the responsibility of the user community."
https://wiki.netbsd.org/ports/
---
Izumi Tsutsui
From: Martin Husemann <martin@duskware.de>
To: gnats-bugs@netbsd.org
Cc:
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sat, 4 Nov 2023 12:05:08 +0100
On Sat, Nov 04, 2023 at 10:20:01AM +0000, Izumi Tsutsui wrote:
> I doubt this problem was really compiler issue and
> I wonder if it's okay to assume "FE_TONEAREST" is default
> because FE_TOZERO works.
FE_TONEAREST is the documented default mode and applications rely on
that. The MD FPU context setup code needs to make sure this is what
processes start with.
Just switching the mode here because it works by chance for this example
is not a good idea, we need to fully understand what goes wrong.
Martin
From: Rin Okuyama <rokuyama.rk@gmail.com>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, netbsd-bugs@netbsd.org
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sat, 4 Nov 2023 22:38:28 +0900
On 2023/11/04 19:16, Izumi Tsutsui wrote:
>>> Unless some MIPS guru has proper idea how this issue should be fixed,
>>> I'd like to commit workaround fix to disable -DHonor_FLT_ROUNDS in
>>> src/lib/libc/gdtoa/Makefile.inc in ${MACHINE_CPU}=="mips" case.
>>
>> (1) How about -current or netbsd-10, which have GCC 10.5?
>>
>> Less likely, but if this is a temporal problem for specific
>> versions of GCC, we can restrict the workaround to netbsd-9.
>
> I have not tried it, but last time I tried netbsd-10 kernel
> on NWS-3260 it was very unstable and looked lost software interrupts
> many times, so I'm currently testing NWS-3260 on netbsd-9.
Thanks, I understand the situation :(
> I doubt this problem was really compiler issue and
> I wonder if it's okay to assume "FE_TONEAREST" is default
> because FE_TOZERO works.
>
>> (2) Can we exclude ``mipsn{,64}e[bl]''? -current and netbsd-10 have
>> ${MACHINE_MIPS64} macro for this purpose, but netbsd-9 does not :(
>
> What's your motivation?
>
> Performance? If so, is it visible or measurable?
> Consistency? If so, is there any rationale of Honor_FLT_ROUNDS
> implementation? Actually we already have an exception (vax).
>
> If you have a working patch to achive your intention in both
> HEAD and release branches, it's fine. If not, sorry I don't
> have motivation to prepare such complexities.
>
> I'm trying to fix visible issue (and real problems like invalid
> strings stored in /etc/ntp.conf etc.). If you want possible
> performace or design consistency, it should be measured or
> defined by people who want it, because we are on Tier-II ports
> "keeping it working is the responsibility of the user community."
> https://wiki.netbsd.org/ports/
I'm worried about consistency.
IMO, it is less surprising that vax is treated differently here;
it does not comply IEEE 754, and no working fenv implementation
at the moment.
This patch is working both for -current/netbsd-10 and netbsd-9:
https://www.netbsd.org/~rin/gdtoa_port-mips_57680.patch
Thanks,
rin
From: Taylor R Campbell <riastradh@NetBSD.org>
To: gnats-bugs@netbsd.org
Cc: port-mips-maintainer@netbsd.org, gnats-admin@netbsd.org,
netbsd-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sat, 4 Nov 2023 16:07:00 +0000
> Date: Sat, 4 Nov 2023 10:20:01 +0000 (UTC)
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> I doubt this problem was really compiler issue and
> I wonder if it's okay to assume "FE_TONEAREST" is default
> because FE_TOZERO works.
FE_TONEAREST is the correct default. This has been the standard in
IEEE 754 since 1985; essentially all hardware since then will
implement it as the default, and essentially all numerical software
that relies on any rounding mode will rely on that as the default.
If the code doesn't work with FE_TONEAREST then there's something
wrong with the code, not with the choice of default rounding mode.
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sun, 5 Nov 2023 03:05:04 +0900
> > I doubt this problem was really compiler issue and
> > I wonder if it's okay to assume "FE_TONEAREST" is default
> > because FE_TOZERO works.
>
> FE_TONEAREST is the correct default. This has been the standard in
> IEEE 754 since 1985; essentially all hardware since then will
> implement it as the default, and essentially all numerical software
> that relies on any rounding mode will rely on that as the default.
Even in case that libm is not linked?
Anyway, I'm a bit disgusted because everyone complains
"investigate and fix actual problem rather than temprary workaround"
without MD analysis.
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rokuyama.rk@gmail.com
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sun, 5 Nov 2023 03:42:14 +0900
> >> (1) How about -current or netbsd-10, which have GCC 10.5?
> >>
> >> Less likely, but if this is a temporal problem for specific
> >> versions of GCC, we can restrict the workaround to netbsd-9.
> >
> > I have not tried it, but last time I tried netbsd-10 kernel
> > on NWS-3260 it was very unstable and looked lost software interrupts
> > many times, so I'm currently testing NWS-3260 on netbsd-9.
>
> Thanks, I understand the situation :(
I've tried printf "%.1f" on netbsd-10/202311031550Z with on NFS root.
A bit better, but still wrong result.
(typed from framebuffer console)
---
# uname -a
NetBSD 10.0_BETA NetBSD 10.0_BETA (GENERIC) #0: Fri Nov 3 10:27:30 UTC 2023 mkrepro@mkrepro.NetBSD.org:/usr/src/sys/arch/newsmips/compile/GENERIC newsmips
# ./a.out
314.2
314
?70.8
1570
#
---
Izumi Tsutsui
From: RVP <rvp@SDF.ORG>
To: gnats-bugs@netbsd.org
Cc: tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong
resultsonR3000mipseb
Date: Sat, 4 Nov 2023 23:48:41 +0000 (UTC)
On Sat, 4 Nov 2023, Izumi Tsutsui wrote:
>
> I've tried printf "%.1f" on netbsd-10/202311031550Z with on NFS root.
> A bit better, but still wrong result.
>
> (typed from framebuffer console)
> ---
> # uname -a
> NetBSD 10.0_BETA NetBSD 10.0_BETA (GENERIC) #0: Fri Nov 3 10:27:30 UTC 2023 mkrepro@mkrepro.NetBSD.org:/usr/src/sys/arch/newsmips/compile/GENERIC newsmips
> # ./a.out
> 314.2
> 314
> ?70.8
> 1570
> #
> ---
>
That `?' char. which is printed doesn't look random. In ASCII, '0' + 15 is
'?'. So, it appears that instead of printing '1' and '5' individually, we
see '0' + 15 = '?'. Is the katakana in some of the previous emails '0' + 70?
Can you see if disabling optimizations for quorem() helps? dtoa() does
'0' + quorem() in a few places. If it doesn't, try disabling optimizations
for the whole of src/lib/libc/gdtoa/misc.c: If you recall, we saw these same
wrong results when the optimized version in libc was used.
```
diff -urN a/src/lib/libc/gdtoa/dmisc.c b/src/lib/libc/gdtoa/dmisc.c
--- a/src/lib/libc/gdtoa/dmisc.c 2008-03-21 23:13:48.000000000 +0000
+++ b/src/lib/libc/gdtoa/dmisc.c 2023-11-04 23:29:29.107072000 +0000
@@ -104,6 +104,7 @@
#endif
}
+__attribute__ ((optimize(0)))
int
quorem
#ifdef KR_headers
```
-RVP
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sun, 5 Nov 2023 01:41:38 +0000
> Date: Sun, 5 Nov 2023 03:05:04 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> > > I doubt this problem was really compiler issue and
> > > I wonder if it's okay to assume "FE_TONEAREST" is default
> > > because FE_TOZERO works.
> >
> > FE_TONEAREST is the correct default. This has been the standard in
> > IEEE 754 since 1985; essentially all hardware since then will
> > implement it as the default, and essentially all numerical software
> > that relies on any rounding mode will rely on that as the default.
>
> Even in case that libm is not linked?
Correct. With or without libm, the default is _always_ FE_TONEAREST
on any IEEE 754 system. The only supported way to change this is via
fesetround (or the nonstandard legacy fpsetround).
> Anyway, I'm a bit disgusted because everyone complains
> "investigate and fix actual problem rather than temprary workaround"
> without MD analysis.
Sorry, I don't know what the problem is here and I haven't had time to
investigate myself. It seems that this is a problem with some
particular MIPS CPUs.
Perhaps on these CPUs, the kernel is setting the default rounding mode
wrong when it enters a new userland process. You could test this by
writing a program that just queries fegetround and prints the value:
#include <fenv.h>
#include <stdio.h>
int
main(void)
{
printf("FE_TONEAREST = %d\n", (int)FE_TONEAREST);
printf("fegetround() = %d\n", (int)fegetround());
fflush(stdout);
return ferror(stdout);
}
Or, perhaps the rounding mode constants are wrong on this CPU somehow,
and need translation in fegetround/fesetround.
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sun, 5 Nov 2023 14:04:41 +0900
riastradh@ wrote:
> Perhaps on these CPUs, the kernel is setting the default rounding mode
> wrong when it enters a new userland process. You could test this by
> writing a program that just queries fegetround and prints the value:
>
> #include <fenv.h>
> #include <stdio.h>
>
> int
> main(void)
> {
> printf("FE_TONEAREST = %d\n", (int)FE_TONEAREST);
> printf("fegetround() = %d\n", (int)fegetround());
> fflush(stdout);
> return ferror(stdout);
> }
This shows:
---
news3470-% uname -a
NetBSD galant 9.3 NetBSD 9.3 (GENERIC) #0: Sat Nov 4 23:42:11 JST 2023 tsutsui@mirage:/s/tsutsui/netbsd-src/sys/arch/newsmips/compile/obj.newsmips/GENERIC newsmips
news3470-% cat fetest.c
#include <fenv.h>
#include <stdio.h>
int
main(void)
{
printf("FE_TONEAREST = %d\n", (int)FE_TONEAREST);
printf("fegetround() = %d\n", (int)fegetround());
fflush(stdout);
return ferror(stdout);
}
news3470-% cc -o fetest fetest.c
news3470-% ./fetest
FE_TONEAREST = 0
fegetround() = 0
news3470-%
---
So the default round mode (at least in C) seems correct.
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rvp@SDF.ORG
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrongresultsonR3000mipseb
Date: Sun, 5 Nov 2023 14:28:31 +0900
> > I've tried printf "%.1f" on netbsd-10/202311031550Z with on NFS root.
> > A bit better, but still wrong result.
> >
> > (typed from framebuffer console)
> > ---
> > # uname -a
> > NetBSD 10.0_BETA NetBSD 10.0_BETA (GENERIC) #0: Fri Nov 3 10:27:30 UTC 2023 mkrepro@mkrepro.NetBSD.org:/usr/src/sys/arch/newsmips/compile/GENERIC newsmips
> > # ./a.out
> > 314.2
> > 314
> > ?70.8
> > 1570
> > #
> > ---
> >
>
> That `?' char. which is printed doesn't look random. In ASCII, '0' + 15 is
> '?'. So, it appears that instead of printing '1' and '5' individually, we
> see '0' + 15 = '?'. Is the katakana in some of the previous emails '0' + 70?
It's a bit annoying to prepare full 10.0_BETA environment
on the slow machine, so I test your previous test program on 9.3:
---
news3470-% ./m2
3.1
40490FD0
314.1
439D145A
1570.7
44C45970
news3470-% ./m2 | hexdump -Cv
00000000 33 2e 31 0a 34 30 34 39 30 46 44 30 0a 33 31 34 |3.1.40490FD0.314|
00000010 2e 31 0a 34 33 39 44 31 34 35 41 0a 31 35 37 30 |.1.439D145A.1570|
00000020 2e 37 0a 34 34 43 34 35 39 37 30 0a |.7.44C45970.|
0000002c
news3470-% ./m2-O2
.O
40490FD0
3*-5.8
439D145A
?*8.7
44C45970
news3470-% ./m2-O2 | hexdump -Cv
00000000 2e 4f 0a 34 30 34 39 30 46 44 30 0a 33 c4 35 2e |.O.40490FD0.3.5.|
00000010 38 0a 34 33 39 44 31 34 35 41 0a 3f d9 38 2e 37 |8.439D145A.?.8.7|
00000020 0a 34 34 43 34 35 39 37 30 0a |.44C45970.|
0000002a
news3470-%
---
The problem (or compiler issue?) seems more complicated.
> Can you see if disabling optimizations for quorem() helps? dtoa() does
> '0' + quorem() in a few places. If it doesn't, try disabling optimizations
> for the whole of src/lib/libc/gdtoa/misc.c: If you recall, we saw these same
> wrong results when the optimized version in libc was used.
>
> ```
> diff -urN a/src/lib/libc/gdtoa/dmisc.c b/src/lib/libc/gdtoa/dmisc.c
> --- a/src/lib/libc/gdtoa/dmisc.c 2008-03-21 23:13:48.000000000 +0000
> +++ b/src/lib/libc/gdtoa/dmisc.c 2023-11-04 23:29:29.107072000 +0000
> @@ -104,6 +104,7 @@
> #endif
> }
>
> +__attribute__ ((optimize(0)))
> int
> quorem
> #ifdef KR_headers
> ```
Not quite, but it looks optimization changes behaviours.
To test with various libc binaries, I've prepared separate directories
and put libc binaries there, and use LD_LIBRARY_PATH on tests:
1) ./libc-9.3 : libc.so.12.213 binary from NetBSD 9.3 release base.tgz
2) ./libc-O2 : libc.so.12.213 built from 9.3 src/lib/libc here
3) ./libc-O2-and-quorem-O0 :
libc.so.12.213 built from 9.3 src/lib/libc
with the above "force optimize(0) against quorem()" patch
4) ./libc-O1 : libc.so.12.213 built with DBG=-O1 from 9.3 src/lib/libc
5) ./libc-O0 : libc.so.12.213 built with DBG=-O0 from 9.3 src/lib/libc
---
news3470-% uname -a
NetBSD galant 9.3 NetBSD 9.3 (GENERIC) #0: Sat Nov 4 23:42:11 JST 2023 tsutsui@mirage:/s/tsutsui/netbsd-src/sys/arch/newsmips/compile/obj.newsmips/GENERIC newsmips
news3470-% grep ^cpu /var/run/dmesg.boot
cpu0 at mainbus0: MIPS R3000 CPU (0x220) Rev. 2.0 with MIPS R3010 FPC Rev. 2.0
cpu0: 64KB/4B direct-mapped Instruction cache, 64 TLB entries
cpu0: 64KB/4B direct-mapped write-through Data cache
news3470-% cat test.c
#include <stdio.h>
int
main(int argc, char *argv[])
{
float f;
f = 3.14159 * 100;
printf("%.1f\n", f);
printf("%d\n", (int)f);
f = f * 5;
printf("%.1f\n", f);
printf("%d\n", (int)f);
}
news3470-% cc -o test test.c
news3470-% env LD_LIBRARY_PATH=libc-9.3 ldd ./test
./test:
-lc.12 => libc-9.3/libc.so.12
news3470-% env LD_LIBRARY_PATH=libc-9.3 ./test
300.0
314
?00.0
1570
news3470-% env LD_LIBRARY_PATH=libc-O2 ldd ./test
./test:
-lc.12 => libc-O2/libc.so.12
news3470-% env LD_LIBRARY_PATH=libc-O2 ./test
300.0
314
?00.0
1570
news3470-% env LD_LIBRARY_PATH=libc-O2-and-quorem-O0 ldd ./test
./test:
-lc.12 => libc-O2-and-quorem-O0/libc.so.12
news3470-% env LD_LIBRARY_PATH=libc-O2-and-quorem-O0 ./test
300.0
314
?00.0
1570
news3470-% env LD_LIBRARY_PATH=libc-O1 ldd ./test
./test:
-lc.12 => libc-O1/libc.so.12
news3470-% env LD_LIBRARY_PATH=libc-O1 ./test
314.1
314
?70.7
1570
news3470-% env LD_LIBRARY_PATH=libc-O0 ldd ./test
./test:
-lc.12 => libc-O0/libc.so.12
news3470-% env LD_LIBRARY_PATH=libc-O0 ./test
314.2
314
1570.8
1570
news3470-%
---
I'll try to check which function actually requires -O0 later.
(a bit boring work on the slow machine..)
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rvp@SDF.ORG
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrongresultsonR3000mipseb
Date: Sun, 5 Nov 2023 15:49:46 +0900
I wrote:
> I'll try to check which function actually requires -O0 later.
> (a bit boring work on the slow machine..)
Building dtoa.c with -O0 works around:
(on build host)
---
% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/nbmake-newsmips -j4 DBG=-O0 libc.so.12.213
--- dtoa.pico ---
# compile libc/dtoa.pico
/s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-gcc \
-O0 -std=gnu99 -Wall -Wstrict-prototypes -Wmissing-prototypes \
-Wpointer-arith -Wno-sign-compare -Wsystem-headers -Wno-traditional \
-Wa,--fatal-warnings -Wreturn-type -Wswitch -Wshadow -Wcast-qual \
-Wwrite-strings -Wextra -Wno-unused-parameter -Wno-sign-compare \
-Wold-style-definition -Wsign-compare -Wformat=2 -Wno-format-zero-length \
-Werror -fPIE --sysroot=/s/netbsd-9/src/obj.newsmips/destdir.newsmips \
-D_LIBC -DLIBC_SCCS -DSYSLIBC_SCCS -D_REENTRANT -DHESIOD -DINET6 -DNLS -DYP \
-I/s/netbsd-9/src/lib/libc/include -I/s/netbsd-9/src/lib/libc -I. \
-I/s/netbsd-9/src/sys -I/s/netbsd-9/src/lib/libc/compat/../locale \
-I/s/netbsd-9/src/lib/libc/compat/stdlib -I/s/netbsd-9/src/lib/libc/compat/../stdlib \
-D__BUILD_LEGACY -D__HAVE_ASM_ATOMIC_CAS_UP -I/s/netbsd-9/src/lib/libc/../../common/lib/libc/quad \
-I/s/netbsd-9/src/lib/libc/../../common/lib/libc/string \
-I/s/netbsd-9/src/lib/libc/../../common/lib/libc/arch/mips/string \
-D__DBINTERFACE_PRIVATE -I/s/netbsd-9/src/libexec/ld.elf_so \
-I/s/netbsd-9/src/lib/libc/dlfcn -I/s/netbsd-9/src/lib/libc/gdtoa \
-I/s/netbsd-9/src/lib/libc/locale -DHonor_FLT_ROUNDS \
-I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa -DWITH_RUNE \
-I/s/netbsd-9/src/lib/libc -DPOSIX_MISTAKE -DCOMPAT__RES -DUSE_POLL \
-DPORTMAP -DWIDE_DOUBLE -DUSG_COMPAT -c -D_I18N_DYNAMIC -fPIC \
/s/netbsd-9/src/lib/libc/gdtoa/dtoa.c -o dtoa.pico
/s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-objcopy -x dtoa.pico
:
---
(on NWS-3470 target)
---
news3470-% env LD_LIBRARY_PATH=libc-O2-and-dtoa-O0 ldd ./test
./test:
-lc.12 => libc-O2-and-dtoa-O0/libc.so.12
news3470-% env LD_LIBRARY_PATH=libc-O2-and-dtoa-O0 ./test
314.2
314
1570.8
1570
news3470-%
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sun, 5 Nov 2023 17:01:44 +0900
I wrote:
> riastradh@ wrote:
>
> > Perhaps on these CPUs, the kernel is setting the default rounding mode
> > wrong when it enters a new userland process. You could test this by
> > writing a program that just queries fegetround and prints the value:
> >
> > #include <fenv.h>
> > #include <stdio.h>
> >
> > int
> > main(void)
> > {
> > printf("FE_TONEAREST = %d\n", (int)FE_TONEAREST);
> > printf("fegetround() = %d\n", (int)fegetround());
> > fflush(stdout);
> > return ferror(stdout);
> > }
>
> This shows:
> ---
:
> news3470-% cc -o fetest fetest.c
> news3470-% ./fetest
> FE_TONEAREST = 0
> fegetround() = 0
> news3470-%
> ---
It looks dtoa.c alsos use __flt_rounds() defined in
<sys/float_ieee754.h> via FLT_ROUNDS:
---
#ifndef _SYS_FLOAT_IEEE754_H_
#define _SYS_FLOAT_IEEE754_H_
#include <sys/cdefs.h>
#include <sys/featuretest.h>
/*
* feature macro to test for IEEE754
*/
#define _FLOAT_IEEE754 1
#if !defined(__ASSEMBLER__) && !defined(FLT_ROUNDS)
__BEGIN_DECLS
extern int __flt_rounds(void);
__END_DECLS
#define FLT_ROUNDS __flt_rounds()
#endif
:
---
On mips, __flt_round() is a real function in
src/lib/libc/arch/mips/gen/flt_rounds.c:
---
static const int map[] = {
1, /* round to nearest */
0, /* round to zero */
2, /* round to positive infinity */
3 /* round to negative infinity */
};
int
__flt_rounds(void)
{
#ifdef SOFTFLOAT_FOR_GCC
return map[fpgetround()];
#else
int x;
__asm(".set push; .set noat; cfc1 %0,$31; .set pop" : "=r" (x));
return map[x & 0x03];
#endif
}
---
On the other hand, fegetround() is defined as static inline
in <mips/fenv.h>:
---
static inline fpu_control_t
__rfs(void)
{
fpu_control_t __fpsr;
__asm __volatile("cfc1 %0,$31" : "=r" (__fpsr));
return __fpsr;
}
:
__fenv_static inline int
fegetround(void)
{
fexcept_t __fpsr;
__fpsr = __rfs();
return __fpsr & _ROUND_MASK;
}
---
It looks these inline functions make gcc optimization confused,
but now I have one question:
Is there any reason why we don't use -DTrust_FLT_ROUNDS that
just uses __flt_round() in libc, rather hacked fegetround() in libm?
(it looks most ports have flt_round in libc/arch/${MACHINE_CPU}/gen)
src/lib/libc/gdtoaimpl.h has:
---
#ifndef Flt_Rounds
#ifdef FLT_ROUNDS
#define Flt_Rounds FLT_ROUNDS
#else
#define Flt_Rounds 1
#endif
#endif /*Flt_Rounds*/
---
and src/lib/libc/gdtoa/dtoa.c has:
---
#ifdef Honor_FLT_ROUNDS /*{*/
int Rounding;
#ifdef Trust_FLT_ROUNDS /*{{ only define this if FLT_ROUNDS really works! */
Rounding = Flt_Rounds;
#else /*}{*/
Rounding = 1;
switch(fegetround()) {
case FE_TOWARDZERO: Rounding = 0; break;
case FE_UPWARD: Rounding = 2; break;
case FE_DOWNWARD: Rounding = 3;
}
#endif /*}}*/
#endif /*}*/
---
and actually following patch also make dtoa work on NWS-3470 (MIPS1)
even with the default DBG=-O2:
---
Index: gdtoa/Makefile.inc
===================================================================
RCS file: /cvsroot/src/lib/libc/gdtoa/Makefile.inc,v
retrieving revision 1.10.28.1
diff -u -p -d -r1.10.28.1 Makefile.inc
--- gdtoa/Makefile.inc 8 Dec 2019 13:35:51 -0000 1.10.28.1
+++ gdtoa/Makefile.inc 5 Nov 2023 07:54:36 -0000
@@ -8,6 +8,9 @@ CPPFLAGS+=-I${.CURDIR}/gdtoa -I${.CURDIR
CPPFLAGS+=-DNO_FENV_H
.else
CPPFLAGS+=-DHonor_FLT_ROUNDS
+.if ${MACHINE_CPU} == "mips"
+CPPFLAGS+=-DTrust_FLT_ROUNDS
+.endif
.endif
# machine-dependent directory must provide the following:
---
Izumi Tsutsui
From: RVP <rvp@SDF.ORG>
To: gnats-bugs@netbsd.org
Cc:
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000
mipseb
Date: Sun, 5 Nov 2023 10:53:52 +0000 (UTC)
On Sun, 5 Nov 2023, Izumi Tsutsui wrote:
> > I'll try to check which function actually requires -O0 later.
> > (a bit boring work on the slow machine..)
>
> Building dtoa.c with -O0 works around:
>
> ---
>
> (on NWS-3470 target)
> ---
> news3470-% env LD_LIBRARY_PATH=libc-O2-and-dtoa-O0 ldd ./test
> ./test:
> -lc.12 => libc-O2-and-dtoa-O0/libc.so.12
> news3470-% env LD_LIBRARY_PATH=libc-O2-and-dtoa-O0 ./test
> 314.2
> 314
> 1570.8
> 1570
> news3470-%
>
OK, that takes care of the %[eEfFgG] conversions. You might have to apply
the same treatment to gdtoa.c for the %L[eEfFgG] long double printing.
Try the %[aA] (hex) conversions too (though I don't think hdtoa.c will have
any problems).
-RVP
From: RVP <rvp@SDF.ORG>
To: gnats-bugs@netbsd.org
Cc:
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000
mipseb
Date: Sun, 5 Nov 2023 11:01:19 +0000 (UTC)
On Sun, 5 Nov 2023, Izumi Tsutsui wrote:
> On the other hand, fegetround() is defined as static inline
> in <mips/fenv.h>:
>
> ---
> static inline fpu_control_t
> __rfs(void)
> {
> fpu_control_t __fpsr;
>
> __asm __volatile("cfc1 %0,$31" : "=r" (__fpsr));
> return __fpsr;
> }
>
> :
>
> __fenv_static inline int
> fegetround(void)
> {
> fexcept_t __fpsr;
>
> __fpsr = __rfs();
> return __fpsr & _ROUND_MASK;
> }
> ---
>
> It looks these inline functions make gcc optimization confused,
>
Don't see how...
> and actually following patch also make dtoa work on NWS-3470 (MIPS1)
> even with the default DBG=-O2:
>
> ---
> Index: gdtoa/Makefile.inc
> ===================================================================
> RCS file: /cvsroot/src/lib/libc/gdtoa/Makefile.inc,v
> retrieving revision 1.10.28.1
> diff -u -p -d -r1.10.28.1 Makefile.inc
> --- gdtoa/Makefile.inc 8 Dec 2019 13:35:51 -0000 1.10.28.1
> +++ gdtoa/Makefile.inc 5 Nov 2023 07:54:36 -0000
> @@ -8,6 +8,9 @@ CPPFLAGS+=-I${.CURDIR}/gdtoa -I${.CURDIR
> CPPFLAGS+=-DNO_FENV_H
> .else
> CPPFLAGS+=-DHonor_FLT_ROUNDS
> +.if ${MACHINE_CPU} == "mips"
> +CPPFLAGS+=-DTrust_FLT_ROUNDS
> +.endif
> .endif
>
> # machine-dependent directory must provide the following:
>
> ---
>
Don't get this either. With both -DHonor_FLT_ROUNDS and -DTrust_FLT_ROUNDS
defined `int Rounding' should get set to `1'--exactly the same as with
-DHonor_FLT_ROUNDS alone.
-RVP
From: "Taylor R Campbell" <riastradh@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: src/tests/lib/libm
Date: Sun, 5 Nov 2023 15:28:17 +0000
Module Name: src
Committed By: riastradh
Date: Sun Nov 5 15:28:17 UTC 2023
Modified Files:
src/tests/lib/libm: t_fenv.c
Log Message:
t_fenv: Check FLT_ROUNDS whenever we touch the rounding mode.
PR port-mips/57680
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/tests/lib/libm/t_fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Sun, 5 Nov 2023 15:53:15 +0000
This is a multi-part message in MIME format.
--=_UO/DuVWULAgwAF6z8mwyycn6j85jhood
Can you please run the attached program on your R3000 system and share
the output?
--=_UO/DuVWULAgwAF6z8mwyycn6j85jhood
Content-Type: text/plain; charset="ISO-8859-1"; name="test"
Content-Transfer-Encoding: quoted-printable
Content-Disposition: attachment; filename="test.c"
#include <fenv.h>
#include <float.h>
#include <ieeefp.h>
#include <stdio.h>
#pragma STDC FENV_ACCESS ON
static void
show(const char *name)
{
volatile double x =3D 0x1p-53;
printf("%10s: FLT_ROUNDS=3D%d fpgetround=3D%-4d fegetround=3D%-4d"
" z=3D%a w=3D%a\n",
name,
FLT_ROUNDS, (int)fpgetround(), fegetround(),
-1 + x/2, 1 + 3*x);
}
int
main(void)
{
printf("FP_RN=3D%-4d FE_TONEAREST=3D%d\n", FP_RN, FE_TONEAREST);
printf("FP_RZ=3D%-4d FE_TOWARDZERO=3D%d\n", FP_RZ, FE_TOWARDZERO);
printf("FP_RP=3D%-4d FE_UPWARD=3D%d\n", FP_RP, FE_UPWARD);
printf("FP_RM=3D%-4d FE_DOWNWARD=3D%d\n", FP_RM, FE_DOWNWARD);
fpsetround(FP_RN); show("tonearest");
fpsetround(FP_RZ); show("towardzero");
fpsetround(FP_RP); show("upward");
fpsetround(FP_RM); show("downward");
fesetround(FE_TONEAREST); show("tonearest");
fesetround(FE_TOWARDZERO); show("towardzero");
fesetround(FE_UPWARD); show("upward");
fesetround(FE_DOWNWARD); show("downward");
fflush(stdout);
return ferror(stdout);
}
--=_UO/DuVWULAgwAF6z8mwyycn6j85jhood--
From: "Taylor R Campbell" <riastradh@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: src/tests/lib/libm
Date: Sun, 5 Nov 2023 16:06:27 +0000
Module Name: src
Committed By: riastradh
Date: Sun Nov 5 16:06:27 UTC 2023
Modified Files:
src/tests/lib/libm: t_fenv.c
Log Message:
t_fenv: Verify rounding mode takes effect.
At least for addition operations, anyway.
Somewhat redundant with the test t_fe_round added by maya@ but this
gives two minimal pairs to easily diagnose exactly what the rounding
mode is when the wrong one was selected.
PR port-mips/57680
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/tests/lib/libm/t_fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: "Taylor R Campbell" <riastradh@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: src/tests/lib/libm
Date: Sun, 5 Nov 2023 16:28:06 +0000
Module Name: src
Committed By: riastradh
Date: Sun Nov 5 16:28:05 UTC 2023
Modified Files:
src/tests/lib/libm: t_fenv.c
Log Message:
t_fenv: Add #pragma STDC FENV_ACCESS ON and verify FLT_RADIX is 2.
Except gcc doesn't implement this pragma, so make it conditional.
And clang only supports it on some architectures, so just leave it
out for now with a comment about why.
PR port-mips/57680
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/tests/lib/libm/t_fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: "Taylor R Campbell" <riastradh@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: src/tests/lib/libm
Date: Sun, 5 Nov 2023 21:13:07 +0000
Module Name: src
Committed By: riastradh
Date: Sun Nov 5 21:13:07 UTC 2023
Modified Files:
src/tests/lib/libm: t_fenv.c
Log Message:
t_fenv: Improve diagnostics when rounding mode tests fail.
Print the correct input, and print the rounding mode for clarity so
you don't have to cross-reference it by line number.
PR port-mips/57680
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/tests/lib/libm/t_fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: "Taylor R Campbell" <riastradh@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: src/tests/lib/libm
Date: Mon, 6 Nov 2023 13:48:00 +0000
Module Name: src
Committed By: riastradh
Date: Mon Nov 6 13:48:00 UTC 2023
Modified Files:
src/tests/lib/libm: t_fenv.c
Log Message:
t_fenv: Use volatile intermediate to force rounding to double.
See comment for details about why this is necessary.
Should fix these tests on i386 (and perhaps m68k too).
PR port-mips/57680
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/tests/lib/libm/t_fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: "Taylor R Campbell" <riastradh@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: src/tests/lib/libm
Date: Mon, 6 Nov 2023 13:48:13 +0000
Module Name: src
Committed By: riastradh
Date: Mon Nov 6 13:48:13 UTC 2023
Modified Files:
src/tests/lib/libm: t_fenv.c
Log Message:
t_fenv: Factor checks out of switch in checkrounding.
No functional change intended, just tidies up a bit.
PR port-mips/57680
XXX pullup-10
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/tests/lib/libm/t_fenv.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: rvp@SDF.ORG
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Tue, 7 Nov 2023 00:39:32 +0900
> > It looks these inline functions make gcc optimization confused,
> >
>
> Don't see how...
On mips, fpgetround() is defined in <mips/fenv.h> so it's always
available even without libm. I'm not sure how
'#define fegetround()' line in src/lib/libc/gdtoa/gdtoaimp.h
is handled, though..
> Don't get this either. With both -DHonor_FLT_ROUNDS and -DTrust_FLT_ROUNDS
> defined `int Rounding' should get set to `1'--exactly the same as with
> -DHonor_FLT_ROUNDS alone.
It looks the problem is not a (expected) value of "Rounding",
but unexpected optimization around inlined fegetround().
(but not sure)
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Tue, 7 Nov 2023 00:45:43 +0900
> Can you please run the attached program on your R3000 system and share
> the output?
Here it is:
---
news3470-% env LD_LIBRARY_PATH=libc-9.3 ./test-57680
FP_RN=0 FE_TONEAREST=0
FP_RZ=1 FE_TOWARDZERO=1
FP_RP=2 FE_UPWARD=2
FP_RM=3 FE_DOWNWARD=3
tonearest: FLT_ROUNDS=1 fpgetround=0 fegetround=0 z=-0x1p+0 w=0x1.0000000000002p+0
towardzero: FLT_ROUNDS=0 fpgetround=1 fegetround=1 z=-0x1.fffffffffffffp-1 w=0x1.0000000000001p+0
upward: FLT_ROUNDS=2 fpgetround=2 fegetround=2 z=-0x1.fffffffffffffp-1 w=0x1.0000000000002p+0
downward: FLT_ROUNDS=3 fpgetround=3 fegetround=3 z=-0x1p+0 w=0x1.0000000000001p+0
tonearest: FLT_ROUNDS=1 fpgetround=0 fegetround=0 z=-0x1p+0 w=0x1.0000000000002p+0
towardzero: FLT_ROUNDS=0 fpgetround=1 fegetround=1 z=-0x1.fffffffffffffp-1 w=0x1.0000000000001p+0
upward: FLT_ROUNDS=2 fpgetround=2 fegetround=2 z=-0x1.fffffffffffffp-1 w=0x1.0000000000002p+0
downward: FLT_ROUNDS=3 fpgetround=3 fegetround=3 z=-0x1p+0 w=0x1.0000000000001p+0
news3470-%
---
(Expected?)
---
Izumi Tsutsui
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Mon, 6 Nov 2023 16:22:38 +0000
This is a multi-part message in MIME format.
--=_QJyEfqlAfncoM8fB56hLDQdX5vxg3caH
> Date: Tue, 7 Nov 2023 00:45:43 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> > Can you please run the attached program on your R3000 system and share
> > the output?
>
> Here it is:
> ...
> (Expected?)
That output looks correct. The FLT_ROUNDS numbers are prescribed in
the C standard, while the fpgetround/fesetround numbers are not and
may vary from machine to machine, but at least it looks like the
numbers are consistent and the results have the correct rounding.
So the libc/libm functions fpgetround and fegetround seem to agree,
when set with either fpsetround or fesetround. (Amusingly, it appears
fpsetround has been broken on i386 since the introduction of SSE.
Oops! PR port-i386/57684: https://gnats.NetBSD.org/57684)
Can you try the attached program, with and without libm linked?
rm -f test1 && make test1 && ./test1
rm -f test1 && make test1 LDLIBS=-lm && ./test1
The numbers in the output should agree, and the text should be
different to verify that the linking or non-linking made a difference.
--=_QJyEfqlAfncoM8fB56hLDQdX5vxg3caH
Content-Type: text/plain; charset="ISO-8859-1"; name="test1"
Content-Transfer-Encoding: quoted-printable
Content-Disposition: attachment; filename="test1.c"
#include <fenv.h>
#include <float.h>
#include <stdio.h>
__weakref_visible int fegetround_weak(void) __weak_reference(fegetround);
int
main(void)
{
printf("FLT_ROUNDS=3D%d\n", FLT_ROUNDS);
if (fegetround_weak)
printf("fegetround()=3D%d\n", fegetround_weak());
else
printf("FE_TONEAREST=3D%d\n", FE_TONEAREST);
fflush(stdout);
return ferror(stdout);
}
--=_QJyEfqlAfncoM8fB56hLDQdX5vxg3caH--
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Tue, 7 Nov 2023 01:49:34 +0900
> Can you try the attached program, with and without libm linked?
>
> rm -f test1 && make test1 && ./test1
> rm -f test1 && make test1 LDLIBS=-lm && ./test1
---
news3470-% rm -f test1 && make test1 && ./test1
cc -O2 -o test1 test1.c
FLT_ROUNDS=1
fegetround()=0
news3470-% rm -f test1 && make test1 LDLIBS=-lm && ./test1
cc -O2 -o test1 test1.c -lm
FLT_ROUNDS=1
fegetround()=0
news3470-%
---
As I wrote an other mail, <mips/fenv.h> always has fegetround()
(and other fe*() functions) as static inline functions:
https://github.com/NetBSD/src/blob/trunk/sys/arch/mips/include/fenv.h
so I'm afraid __weak_reference(fegetround) will never referred on mips.
(I'm not sure how __weak_reference() works in such static inline cases)
---
Izumi Tsutsui
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Mon, 6 Nov 2023 17:04:08 +0000
This is a multi-part message in MIME format.
--=_eoavAYPm/lvdxE8JbrWxVr5OLxSgiJLT
> Date: Tue, 7 Nov 2023 01:49:34 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> ---
> news3470-% rm -f test1 && make test1 && ./test1
> cc -O2 -o test1 test1.c
> FLT_ROUNDS=1
> fegetround()=0
> news3470-% rm -f test1 && make test1 LDLIBS=-lm && ./test1
> cc -O2 -o test1 test1.c -lm
> FLT_ROUNDS=1
> fegetround()=0
> news3470-%
> ---
>
> As I wrote an other mail, <mips/fenv.h> always has fegetround()
> (and other fe*() functions) as static inline functions:
> https://github.com/NetBSD/src/blob/trunk/sys/arch/mips/include/fenv.h
> so I'm afraid __weak_reference(fegetround) will never referred on mips.
> (I'm not sure how __weak_reference() works in such static inline cases)
I was assuming the weak reference wouldn't pick up the static inline,
but I guess I was wrong.
Try the attached test2 instead, with and without -lm as with test1?
test2 doesn't include fenv.h, so it shouldn't get the static inline
fegetround from there -- it should only get the library symbols.
Can you also share the output of these commands?
nm -gD /lib/libc.so | grep f.getround
nm -gD /lib/libm.so | grep f.getround
objdump -dr /lib/libc.so | grep -A15 'f.getround>:'
objdump -dr /lib/libm.so | grep -A15 'f.getround>:'
objdump -dr $OBJDIR/lib/libc/dtoa.o | grep -A40 'dtoa>:'
(You can do these with the cross-build toolchain instead, of course,
if that's more convenient.)
--=_eoavAYPm/lvdxE8JbrWxVr5OLxSgiJLT
Content-Type: text/plain; charset="ISO-8859-1"; name="test2"
Content-Transfer-Encoding: quoted-printable
Content-Disposition: attachment; filename="test2.c"
#include <float.h>
#include <stdio.h>
#define FE_TONEAREST 0
__weakref_visible int fegetround_weak(void) __weak_reference(fegetround);
int
main(void)
{
printf("FLT_ROUNDS=3D%d\n", FLT_ROUNDS);
if (fegetround_weak)
printf("fegetround()=3D%d\n", fegetround_weak());
else
printf("FE_TONEAREST=3D%d\n", FE_TONEAREST);
fflush(stdout);
return ferror(stdout);
}
--=_eoavAYPm/lvdxE8JbrWxVr5OLxSgiJLT--
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Mon, 6 Nov 2023 17:13:28 +0000
And a couple more things that might help:
nm /lib/libc.a \
| awk '
/:$/ { file = $1; next }
/f.getround/ { if (file) print file; file = 0; print }
'
nm /lib/libm.a \
| awk '
/:$/ { file = $1; next }
/f.getround/ { if (file) print file; file = 0; print }
'
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Tue, 7 Nov 2023 02:47:16 +0900
> > As I wrote an other mail, <mips/fenv.h> always has fegetround()
> > (and other fe*() functions) as static inline functions:
> > https://github.com/NetBSD/src/blob/trunk/sys/arch/mips/include/fenv.h
> > so I'm afraid __weak_reference(fegetround) will never referred on mips.
> > (I'm not sure how __weak_reference() works in such static inline cases)
>
> I was assuming the weak reference wouldn't pick up the static inline,
> but I guess I was wrong.
It looks it does.
With DBG="-save-temps -O2 -fno-inline" dtoa.pico emits the following asm:
---
.file 1 "dtoa.c"
.section .mdebug.abi32
.previous
.nan legacy
.module fp=32
.module nooddspreg
.abicalls
.text
.align 2
$LFB14 = .
.cfi_startproc
.set nomips16
.set nomicromips
.ent __rfs
.type __rfs, @function
__rfs:
.frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0
.mask 0x00000000,0
.fmask 0x00000000,0
#APP
# 78 "/s/netbsd-9/src/obj.newsmips/destdir.newsmips/usr/include/mips/fenv.h" 1
cfc1 $2,$31
# 0 "" 2
#NO_APP
jr $31
.end __rfs
.cfi_endproc
$LFE14:
.size __rfs, .-__rfs
.align 2
$LFB21 = .
.cfi_startproc
.set nomips16
.set nomicromips
.ent fegetround
.type fegetround, @function
fegetround:
.frame $sp,32,$31 # vars= 0, regs= 1/0, args= 16, gp= 8
.mask 0x80000000,-4
.fmask 0x00000000,0
.set noreorder
.cpload $25
.set nomacro
lw $25,%got(__rfs)($28)
addiu $sp,$sp,-32
.cfi_def_cfa_offset 32
addiu $25,$25,%lo(__rfs)
sw $31,28($sp)
.cprestore 16
.cfi_offset 31, -4
.reloc 1f,R_MIPS_JALR,__rfs
1: jalr $25
nop
lw $31,28($sp)
andi $2,$2,0x3
jr $31
addiu $sp,$sp,32
.cfi_def_cfa_offset 0
.cfi_restore 31
.set macro
.set reorder
.end fegetround
.cfi_endproc
$LFE21:
.size fegetround, .-fegetround
__libc_fegetround_ref = fegetround
.section .rodata.str1.4,"aMS",@progbits,1
.align 2
$LC0:
.ascii "Infinity\000"
.align 2
$LC1:
.ascii "NaN\000"
.align 2
$LC2:
.ascii "0\000"
.text
.align 2
.globl __dtoa
$LFB45 = .
.cfi_startproc
.set nomips16
.set nomicromips
.ent __dtoa
.type __dtoa, @function
__dtoa:
.frame $sp,120,$31 # vars= 56, regs= 10/0, args= 16, gp= 8
.mask 0xc0ff0000,-4
.fmask 0x00000000,0
.set noreorder
.cpload $25
.set nomacro
lw $25,%got(__libc_fegetround_ref)($28)
addiu $sp,$sp,-120
.cfi_def_cfa_offset 120
addiu $25,$25,%lo(__libc_fegetround_ref)
.cprestore 16
sw $18,88($sp)
sw $31,116($sp)
sw $fp,112($sp)
sw $23,108($sp)
sw $22,104($sp)
sw $21,100($sp)
sw $20,96($sp)
sw $19,92($sp)
sw $17,84($sp)
sw $16,80($sp)
swc1 $f12,124($sp)
swc1 $f13,120($sp)
sw $7,132($sp)
.cfi_offset 18, -32
.cfi_offset 31, -4
.cfi_offset 30, -8
.cfi_offset 23, -12
.cfi_offset 22, -16
.cfi_offset 21, -20
.cfi_offset 20, -24
.cfi_offset 19, -28
.cfi_offset 17, -36
.cfi_offset 16, -40
lw $3,140($sp)
.reloc 1f,R_MIPS_JALR,__libc_fegetround_ref
1: jalr $25
move $18,$6
addiu $2,$2,-1
sltu $4,$2,3
lw $28,16($sp)
beq $4,$0,$L153
li $20,1 # 0x1
---
i.e. fegetround() (via weak_reference) and __rfs() are linked as functions.
With DBG="-save-temps -O2" (i.e. default) dtoa.pico emits:
---
.file 1 "dtoa.c"
.section .mdebug.abi32
.previous
.nan legacy
.module fp=32
.module nooddspreg
.abicalls
.text
.section .rodata.str1.4,"aMS",@progbits,1
.align 2
$LC0:
.ascii "Infinity\000"
.align 2
$LC1:
.ascii "NaN\000"
.align 2
$LC2:
.ascii "0\000"
.text
.align 2
.globl __dtoa
$LFB45 = .
.cfi_startproc
.set nomips16
.set nomicromips
.ent __dtoa
.type __dtoa, @function
__dtoa:
.frame $sp,120,$31 # vars= 56, regs= 10/0, args= 16, gp= 8
.mask 0xc0ff0000,-4
.fmask 0x00000000,0
.set noreorder
.cpload $25
.set reorder
addiu $sp,$sp,-120
.cfi_def_cfa_offset 120
.cprestore 16
sw $18,88($sp)
sw $31,116($sp)
sw $fp,112($sp)
sw $23,108($sp)
sw $22,104($sp)
sw $21,100($sp)
sw $20,96($sp)
sw $19,92($sp)
sw $17,84($sp)
sw $16,80($sp)
.cfi_offset 18, -32
.cfi_offset 31, -4
.cfi_offset 30, -8
.cfi_offset 23, -12
.cfi_offset 22, -16
.cfi_offset 21, -20
.cfi_offset 20, -24
.cfi_offset 19, -28
.cfi_offset 17, -36
.cfi_offset 16, -40
swc1 $f12,124($sp)
swc1 $f13,120($sp)
move $18,$6
sw $7,132($sp)
lw $3,140($sp)
#APP
# 78 "/s/netbsd-9/src/obj.newsmips/destdir.newsmips/usr/include/mips/fenv.h" 1
cfc1 $2,$31
# 0 "" 2
#NO_APP
andi $2,$2,0x3
^^^^^^^^^^^^^^^^^ this may be "__fpsr & _ROUND_MASK" in fegetround()?
addiu $2,$2,-1
sltu $4,$2,3
.set noreorder
.set nomacro
beq $4,$0,$L149
li $20,1 # 0x1
.set macro
.set reorder
---
BTW, weird enough, gcc with DBG="-save-temps -O2" complains about
-Wimplicit-fallthrough:
---
/s/netbsd-9/src/lib/libc/gdtoa/dtoa.c: In function '__dtoa':
/s/netbsd-9/src/lib/libc/gdtoa/dtoa.c:316:14: warning: this statement may fall through [-Wimplicit-fallthrough=]
leftright = 0;
~~~~~~~~~~^~~
/s/netbsd-9/src/lib/libc/gdtoa/dtoa.c:318:3: note: here
case 4:
^~~~
/s/netbsd-9/src/lib/libc/gdtoa/dtoa.c:324:14: warning: this statement may fall through [-Wimplicit-fallthrough=]
leftright = 0;
~~~~~~~~~~^~~
/s/netbsd-9/src/lib/libc/gdtoa/dtoa.c:326:3: note: here
case 5:
^~~~
---
while not if -save-temps is not specified..
> Try the attached test2 instead, with and without -lm as with test1?
> test2 doesn't include fenv.h, so it shouldn't get the static inline
> fegetround from there -- it should only get the library symbols.
Here it is:
---
news3470-% rm -f test2 && make test2 && ./test2
cc -O2 -o test2 test2.c
FLT_ROUNDS=1
FE_TONEAREST=0
news3470-% rm -f test2 && make test2 LDLIBS=-lm && ./test2
cc -O2 -o test2 test2.c -lm
FLT_ROUNDS=1
fegetround()=0
news3470-%
---
(seems expected)
> Can you also share the output of these commands?
> nm -gD /lib/libc.so | grep f.getround
(On NWS-5000, which certainly has 9.3 release libraries)
---
news5000-% nm -gD /lib/libc.so | grep f.getround
0005e970 T _fpgetround
0005e970 W fpgetround
---
> nm -gD /lib/libm.so | grep f.getround
---
news5000-% nm -gD /lib/libm.so | grep f.getround
0001d644 T _fegetround
0001d644 W fegetround
---
> objdump -dr /lib/libc.so | grep -A15 'f.getround>:'
---
news5000-% objdump -dr /lib/libc.so | grep -A15 'f.getround>:'
0005e970 <_fpgetround>:
5e970: 4442f800 cfc1 v0,$31
5e974: 03e00008 jr ra
5e978: 30420003 andi v0,v0,0x3
5e97c: 00000000 nop
0005e980 <_fpgetmask>:
5e980: 4442f800 cfc1 v0,$31
5e984: 00000000 nop
5e988: 000211c2 srl v0,v0,0x7
5e98c: 03e00008 jr ra
5e990: 3042001f andi v0,v0,0x1f
...
0005e9a0 <__signbitd>:
5e9a0: e7ad0000 swc1 $f13,0(sp)
---
> objdump -dr /lib/libm.so | grep -A15 'f.getround>:'
---
news5000-% objdump -dr /lib/libm.so | grep -A15 'f.getround>:'
0001d644 <_fegetround>:
1d644: 4442f800 cfc1 v0,$31
1d648: 03e00008 jr ra
1d64c: 30420003 andi v0,v0,0x3
0001d650 <_fesetround>:
1d650: 2403fffc li v1,-4
1d654: 00831024 and v0,a0,v1
1d658: 14400008 bnez v0,1d67c <_fesetround+0x2c>
1d65c: 00000000 nop
1d660: 4445f800 cfc1 a1,$31
1d664: 00000000 nop
1d668: 00a31824 and v1,a1,v1
1d66c: 00832025 or a0,a0,v1
1d670: 44c4f800 ctc1 a0,$31
1d674: 03e00008 jr ra
---
> objdump -dr $OBJDIR/lib/libc/dtoa.o | grep -A40 'dtoa>:'
(on cross-build i386 host)
---
mirage-% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-objdump -d obj.newsmips/dtoa.o | grep -A40 'dtoa>:'
00000000 <__dtoa>:
0: 3c1c0000 lui gp,0x0
0: R_MIPS_HI16 _gp_disp
4: 279c0000 addiu gp,gp,0
4: R_MIPS_LO16 _gp_disp
8: 0399e021 addu gp,gp,t9
c: 27bdff88 addiu sp,sp,-120
10: afbc0010 sw gp,16(sp)
14: afb20058 sw s2,88(sp)
18: afbf0074 sw ra,116(sp)
1c: afbe0070 sw s8,112(sp)
20: afb7006c sw s7,108(sp)
24: afb60068 sw s6,104(sp)
28: afb50064 sw s5,100(sp)
2c: afb40060 sw s4,96(sp)
30: afb3005c sw s3,92(sp)
34: afb10054 sw s1,84(sp)
38: afb00050 sw s0,80(sp)
3c: e7ac007c swc1 $f12,124(sp)
40: e7ad0078 swc1 $f13,120(sp)
44: 00c09025 move s2,a2
48: afa70084 sw a3,132(sp)
4c: 8fa3008c lw v1,140(sp)
50: 4442f800 cfc1 v0,$31
54: 00000000 nop
58: 30420003 andi v0,v0,0x3
5c: 2442ffff addiu v0,v0,-1
60: 2c440003 sltiu a0,v0,3
64: 108000cb beqz a0,394 <__dtoa+0x394>
68: 24140001 li s4,1
6c: 8f840000 lw a0,0(gp)
6c: R_MIPS_GOT16 .rodata
70: 00021080 sll v0,v0,0x2
74: 24840000 addiu a0,a0,0
74: R_MIPS_LO16 .rodata
78: 00441021 addu v0,v0,a0
7c: 8fa5007c lw a1,124(sp)
80: 8fa40078 lw a0,120(sp)
84: 8fb00078 lw s0,120(sp)
88: 8c540000 lw s4,0(v0)
8c: afa50024 sw a1,36(sp)
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Tue, 7 Nov 2023 02:59:54 +0900
> And a couple more things that might help:
>
> nm /lib/libc.a \
> | awk '
> /:$/ { file = $1; next }
> /f.getround/ { if (file) print file; file = 0; print }
> '
(maybe it should be /usr/lib/libc.a)
---
$ nm /usr/lib/libc.a \
| awk '
/:$/ { file = $1; next }
/f.getround/ { if (file) print file; file = 0; print }
'
fpgetround.o:
00000000 T _fpgetround
00000000 W fpgetround
---
> nm /lib/libm.a \
> | awk '
> /:$/ { file = $1; next }
> /f.getround/ { if (file) print file; file = 0; print }
> '
---
$ nm /usr/lib/libm.a \
| awk '
/:$/ { file = $1; next }
/f.getround/ { if (file) print file; file = 0; print }
'
fenv.o:
00000084 T _fegetround
00000084 W fegetround
---
Izumi Tsutsui
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Mon, 6 Nov 2023 21:45:52 +0000
> Date: Sun, 5 Nov 2023 17:01:44 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> It looks these inline functions make gcc optimization confused,
> but now I have one question:
>
> Is there any reason why we don't use -DTrust_FLT_ROUNDS that
> just uses __flt_round() in libc, rather hacked fegetround() in libm?
> (it looks most ports have flt_round in libc/arch/${MACHINE_CPU}/gen)
This is a good question. I think that should work, and it might be
better than the fegetround weak reference. But I would want to do
some testing first. I would also like to confirm that t_fenv, which
now checks FLT_ROUNDS against fpgetround and fegetround, works on all
architectures.
It is a little concerning that we have so many copies of the same
logic -- some of which are not quite correct, like the i387
fpsetround.
> and actually following patch also make dtoa work on NWS-3470 (MIPS1)
> even with the default DBG=-O2:
> ...
> +.if ${MACHINE_CPU} == "mips"
> +CPPFLAGS+=-DTrust_FLT_ROUNDS
> +.endif
Can you share the output of `objdump -dr dtoa.pico' in libc built with
and without this flag to compare?
Does the problem manifest if you statically link libc too?
From: RVP <rvp@SDF.ORG>
To: gnats-bugs@netbsd.org
Cc:
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000
mipseb
Date: Tue, 7 Nov 2023 01:29:41 +0000 (UTC)
On Mon, 6 Nov 2023, Izumi Tsutsui wrote:
> > Don't get this either. With both -DHonor_FLT_ROUNDS and -DTrust_FLT_ROUNDS
> > defined `int Rounding' should get set to `1'--exactly the same as with
> > -DHonor_FLT_ROUNDS alone.
>
> It looks the problem is not a (expected) value of "Rounding",
> but unexpected optimization around inlined fegetround().
> (but not sure)
>
Hmm. I think I see what you mean.
__flt_rounds() in src/lib/libc/arch/mips/gen/flt_rounds.c does:
__asm(".set push; .set noat; cfc1 %0,$31; .set pop" : "=r" (x));
while fegetround() -> __rfs() in src/sys/arch/mips/include/fenv.h only
does:
__asm __volatile("cfc1 %0,$31" : "=r" (__fpsr));
According to "9.27.11 Directives to save and restore options" in the GAS
manual (https://sourceware.org/binutils/docs-2.41/as.html#MIPS_002dDependent)
The directives .set push and .set pop may be used to save
and restore the current settings for all the options which
are controlled by .set. The .set push directive saves the
current settings on a stack. The .set pop directive pops
the stack and restores the settings.
These directives can be useful inside an macro which must
change an option such as the ISA level or instruction
reordering but does not want to change the state of the
code which invoked the macro.
So, maybe a ".set push; ...; .set pop" is needed for older MIPS? Can you
change __rfs() like that?
-RVP
From: Taylor R Campbell <riastradh@NetBSD.org>
To: RVP <rvp@SDF.ORG>
Cc: gnats-bugs@netbsd.org, port-mips-maintainer@netbsd.org,
gnats-admin@netbsd.org, netbsd-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000
mipseb
Date: Tue, 7 Nov 2023 02:13:05 +0000
> Date: Tue, 7 Nov 2023 01:29:41 +0000 (UTC)
> From: RVP <rvp@SDF.ORG>
>
> __flt_rounds() in src/lib/libc/arch/mips/gen/flt_rounds.c does:
>
> __asm(".set push; .set noat; cfc1 %0,$31; .set pop" : "=r" (x));
>
> while fegetround() -> __rfs() in src/sys/arch/mips/include/fenv.h only
> does:
>
> __asm __volatile("cfc1 %0,$31" : "=r" (__fpsr));
> [...]
> So, maybe a ".set push; ...; .set pop" is needed for older MIPS? Can you
> change __rfs() like that?
It's possible that change is correct, but I doubt it's the culprit.
In the objdump output that tsutsui@ quoted from __dtoa in the broken
libc, which I confirmed in my own build in the .o and .pico code
(although I haven't tested my build -- no hardware), there is no use
of the at register ($1, no overlap with any vN) and there is a nop in
the cfc1 load delay slot:
50: 4442f800 cfc1 v0,$31
54: 00000000 nop
58: 30420003 andi v0,v0,0x3
So while maybe we ought to set noat and noreorder, and maybe we ought
to add a nop in the asm, that doesn't seem to be the source of the
problem.
From: RVP <rvp@SDF.ORG>
To: Taylor R Campbell <riastradh@NetBSD.org>
Cc: gnats-bugs@netbsd.org
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000
mipseb
Date: Tue, 7 Nov 2023 03:11:51 +0000 (UTC)
On Tue, 7 Nov 2023, Taylor R Campbell wrote:
> So while maybe we ought to set noat and noreorder, and maybe we ought
> to add a nop in the asm, that doesn't seem to be the source of the
> problem.
>
Looking at the dump, I see that in the inline case, we have:
.type __dtoa, @function
__dtoa:
[...]
.set reorder
[...]
cfc1 $2,$31
andi $2,$2,0x3
[...]
while in the non-inline case, it is:
.type __dtoa, @function
__dtoa:
[...]
.set noreorder
[...]
.reloc 1f,R_MIPS_JALR,__libc_fegetround_ref
1: jalr $25
[...]
which would mean that here the fegetround() (which does its own
`.set noreorder') -> __rfs() instructions are all strictly ordered.
Whereas in the present (inlined) case, all those instructions may be
ordered differently.
Can't say if this would make a difference (no MIPS experience--not even
as a student).
-RVP
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Tue, 7 Nov 2023 22:33:40 +0900
riastradh@ wrote:
> > and actually following patch also make dtoa work on NWS-3470 (MIPS1)
> > even with the default DBG=-O2:
> > ...
> > +.if ${MACHINE_CPU} == "mips"
> > +CPPFLAGS+=-DTrust_FLT_ROUNDS
> > +.endif
>
> Can you share the output of `objdump -dr dtoa.pico' in libc built with
> and without this flag to compare?
Without -DTrust_FLT_ROUNDS (default):
---
mirage-% rm obj.newsmips/dtoa.pico
mirage-% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/nbmake-newsmips dtoa.pico
# compile libc/dtoa.pico
/s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-gcc \
-O2 -std=gnu99 -Wall -Wstrict-prototypes -Wmissing-prototypes \
-Wpointer-arith -Wno-sign-compare -Wsystem-headers -Wno-traditional \
-Wa,--fatal-warnings -Wreturn-type -Wswitch -Wshadow -Wcast-qual \
-Wwrite-strings -Wextra -Wno-unused-parameter -Wno-sign-compare \
-Wold-style-definition -Wsign-compare -Wformat=2 -Wno-format-zero-length \
-Werror -fPIE --sysroot=/s/netbsd-9/src/obj.newsmips/destdir.newsmips \
-D_LIBC -DLIBC_SCCS -DSYSLIBC_SCCS -D_REENTRANT -DHESIOD -DINET6 -DNLS -DYP \
-I/s/netbsd-9/src/lib/libc/include -I/s/netbsd-9/src/lib/libc -I. \
-I/s/netbsd-9/src/sys -I/s/netbsd-9/src/lib/libc/compat/../locale \
-I/s/netbsd-9/src/lib/libc/compat/stdlib -I/s/netbsd-9/src/lib/libc/compat/../stdlib \
-D__BUILD_LEGACY -D__HAVE_ASM_ATOMIC_CAS_UP -I/s/netbsd-9/src/lib/libc/../../common/lib/libc/quad \
-I/s/netbsd-9/src/lib/libc/../../common/lib/libc/string \
-I/s/netbsd-9/src/lib/libc/../../common/lib/libc/arch/mips/string \
-D__DBINTERFACE_PRIVATE -I/s/netbsd-9/src/libexec/ld.elf_so \
-I/s/netbsd-9/src/lib/libc/dlfcn -I/s/netbsd-9/src/lib/libc/gdtoa \
-I/s/netbsd-9/src/lib/libc/locale -DHonor_FLT_ROUNDS \
-I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa -DWITH_RUNE \
-I/s/netbsd-9/src/lib/libc -DPOSIX_MISTAKE -DCOMPAT__RES -DUSE_POLL \
-DPORTMAP -DWIDE_DOUBLE -DUSG_COMPAT -c -D_I18N_DYNAMIC -fPIC \
/s/netbsd-9/src/lib/libc/gdtoa/dtoa.c -o dtoa.pico
/s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-objcopy -x dtoa.pico
mirage-% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-objdump -dr obj.newsmips/dtoa.pico
328: 00000000 nop
32c: 45000003 bc1f 33c <__dtoa+0x33c>
330: 00a0b825 move s7,a1
334: 46240000 add.d $f0,$f0,$f4
338: 2484ffff addiu a0,a0,-1
33c: 24820030 addiu v0,a0,48
340: 00021600 sll v0,v0,0x18
344: 46260032 c.eq.d $f0,$f6
348: 00021603 sra v0,v0,0x18
34c: 4500ffe3 bc1f 2dc <__dtoa+0x2dc>
350: a0a2ffff sb v0,-1(a1)
354: 8f990000 lw t9,0(gp)
354: R_MIPS_CALL16 __Bfree_D2A
358: 00000000 nop
35c: 0320f809 jalr t9
35c: R_MIPS_JALR __Bfree_D2A
360: 03c02025 move a0,s8
364: 12f102b6 beq s7,s1,e40 <__dtoa+0xe40>
368: 24020030 li v0,48
36c: 26100001 addiu s0,s0,1
370: 8fa20088 lw v0,136(sp)
374: a2e00000 sb zero,0(s7)
378: ac500000 sw s0,0(v0)
37c: 8fa20090 lw v0,144(sp)
380: 00000000 nop
384: 10400023 beqz v0,414 <__dtoa+0x414>
388: 00000000 nop
38c: 10000021 b 414 <__dtoa+0x414>
390: ac570000 sw s7,0(v0)
394: 8fa5007c lw a1,124(sp)
398: 8fa40078 lw a0,120(sp)
39c: 8fb00078 lw s0,120(sp)
3a0: afa50024 sw a1,36(sp)
3a4: 0601ff3c bgez s0,98 <__dtoa+0x98>
3a8: afa40020 sw a0,32(sp)
3ac: 3c027fff lui v0,0x7fff
3b0: 3442ffff ori v0,v0,0xffff
3b4: 02028024 and s0,s0,v0
3b8: 24020001 li v0,1
3bc: ac620000 sw v0,0(v1)
3c0: 3c027ff0 lui v0,0x7ff0
3c4: 02022024 and a0,s0,v0
3c8: 1482ff37 bne a0,v0,a8 <__dtoa+0xa8>
3cc: afb00020 sw s0,32(sp)
3d0: 8fa30088 lw v1,136(sp)
3d4: 2402270f li v0,9999
3d8: ac620000 sw v0,0(v1)
3dc: 8fa20024 lw v0,36(sp)
3e0: 8f990000 lw t9,0(gp)
3e0: R_MIPS_CALL16 __nrv_alloc_D2A
3e4: 14400005 bnez v0,3fc <__dtoa+0x3fc>
3e8: 3c02000f lui v0,0xf
3ec: 3442ffff ori v0,v0,0xffff
3f0: 02021024 and v0,s0,v0
3f4: 10400072 beqz v0,5c0 <__dtoa+0x5c0>
3f8: 24060008 li a2,8
3fc: 8f840000 lw a0,0(gp)
3fc: R_MIPS_GOT16 $LC1
400: 8fa50090 lw a1,144(sp)
404: 24060003 li a2,3
408: 0320f809 jalr t9
408: R_MIPS_JALR __nrv_alloc_D2A
40c: 24840000 addiu a0,a0,0
40c: R_MIPS_LO16 $LC1
410: 00408825 move s1,v0
414: 8fbf0074 lw ra,116(sp)
418: 02201025 move v0,s1
41c: 8fbe0070 lw s8,112(sp)
420: 8fb7006c lw s7,108(sp)
424: 8fb60068 lw s6,104(sp)
428: 8fb50064 lw s5,100(sp)
42c: 8fb40060 lw s4,96(sp)
430: 8fb3005c lw s3,92(sp)
434: 8fb20058 lw s2,88(sp)
438: 8fb10054 lw s1,84(sp)
43c: 8fb00050 lw s0,80(sp)
440: 03e00008 jr ra
444: 27bd0078 addiu sp,sp,120
448: afa2003c sw v0,60(sp)
44c: 02c4b023 subu s6,s6,a0
450: 26d3ffff addiu s3,s6,-1
454: 0660ff79 bltz s3,23c <__dtoa+0x23c>
458: 24020001 li v0,1
45c: 0600ff7a bltz s0,248 <__dtoa+0x248>
460: 0000b025 move s6,zero
464: 2e42000a sltiu v0,s2,10
468: 02709821 addu s3,s3,s0
46c: afb00038 sw s0,56(sp)
470: 1040ff7a beqz v0,25c <__dtoa+0x25c>
474: 0000a825 move s5,zero
478: 2a420006 slti v0,s2,6
47c: 1040004b beqz v0,5ac <__dtoa+0x5ac>
480: 3a820001 xori v0,s4,0x1
484: 2c570001 sltiu s7,v0,1
488: 24020003 li v0,3
48c: 12420371 beq s2,v0,1254 <__dtoa+0x1254>
490: 2a420004 slti v0,s2,4
494: 14400071 bnez v0,65c <__dtoa+0x65c>
498: 24020004 li v0,4
49c: 1242036a beq s2,v0,1248 <__dtoa+0x1248>
4a0: 24020005 li v0,5
4a4: 1642ff6e bne s2,v0,260 <__dtoa+0x260>
4a8: 24020001 li v0,1
4ac: afa20034 sw v0,52(sp)
4b0: 8fa20084 lw v0,132(sp)
4b4: 00000000 nop
4b8: 02021021 addu v0,s0,v0
4bc: afa20040 sw v0,64(sp)
4c0: 24420001 addiu v0,v0,1
4c4: afa20028 sw v0,40(sp)
4c8: 1c40006f bgtz v0,688 <__dtoa+0x688>
4cc: 00402025 move a0,v0
4d0: 1000006d b 688 <__dtoa+0x688>
4d4: 24040001 li a0,1
4d8: 8fa40018 lw a0,24(sp)
4dc: 00000000 nop
4e0: 02c42021 addu a0,s6,a0
4e4: 24820432 addiu v0,a0,1074
4e8: 28430021 slti v1,v0,33
4ec: 10600029 beqz v1,594 <__dtoa+0x594>
4f0: 00021023 negu v0,v0
4f4: 8fa30024 lw v1,36(sp)
4f8: 00000000 nop
4fc: 00431004 sllv v0,v1,v0
500: 44820000 mtc1 v0,$f0
504: 00000000 nop
508: 46800021 cvt.d.w $f0,$f0
50c: 44090000 mfc1 t1,$f0
510: 44080800 mfc1 t0,$f1
514: 0441000a bgez v0,540 <__dtoa+0x540>
518: 3c05fe10 lui a1,0xfe10
51c: 8f820000 lw v0,0(gp)
51c: R_MIPS_GOT16 $LC3
520: 44891000 mtc1 t1,$f2
524: c4400004 lwc1 $f0,4(v0)
524: R_MIPS_LO16 $LC3
528: 44881800 mtc1 t0,$f3
52c: c4410000 lwc1 $f1,0(v0)
52c: R_MIPS_LO16 $LC3
530: 46201000 add.d $f0,$f2,$f0
534: 44090000 mfc1 t1,$f0
538: 44080800 mfc1 t0,$f1
53c: 00000000 nop
540: 01051021 addu v0,t0,a1
544: 24050001 li a1,1
548: 01201825 move v1,t1
54c: 2484ffff addiu a0,a0,-1
550: 1000ff00 b 154 <__dtoa+0x154>
554: afa50030 sw a1,48(sp)
558: 8fa30088 lw v1,136(sp)
55c: 8f840000 lw a0,0(gp)
55c: R_MIPS_GOT16 $LC2
560: 8f990000 lw t9,0(gp)
560: R_MIPS_CALL16 __nrv_alloc_D2A
564: 24020001 li v0,1
568: 8fa50090 lw a1,144(sp)
56c: ac620000 sw v0,0(v1)
570: 24060001 li a2,1
574: 0320f809 jalr t9
574: R_MIPS_JALR __nrv_alloc_D2A
578: 24840000 addiu a0,a0,0
578: R_MIPS_LO16 $LC2
57c: 1000ffa5 b 414 <__dtoa+0x414>
580: 00408825 move s1,v0
584: 1282fede beq s4,v0,100 <__dtoa+0x100>
588: 00000000 nop
58c: 1000fedc b 100 <__dtoa+0x100>
590: 0000a025 move s4,zero
594: 8fa50024 lw a1,36(sp)
598: 24830412 addiu v1,a0,1042
59c: 00501004 sllv v0,s0,v0
5a0: 00651806 srlv v1,a1,v1
5a4: 1000ffd6 b 500 <__dtoa+0x500>
5a8: 00431025 or v0,v0,v1
5ac: 2652fffc addiu s2,s2,-4
5b0: 1000ffb5 b 488 <__dtoa+0x488>
5b4: 0000b825 move s7,zero
5b8: 1000ffa4 b 44c <__dtoa+0x44c>
5bc: afa0003c sw zero,60(sp)
5c0: 8f840000 lw a0,0(gp)
5c0: R_MIPS_GOT16 $LC0
5c4: 8fa50090 lw a1,144(sp)
5c8: 0320f809 jalr t9
5c8: R_MIPS_JALR __nrv_alloc_D2A
5cc: 24840000 addiu a0,a0,0
5cc: R_MIPS_LO16 $LC0
5d0: 1000ff90 b 414 <__dtoa+0x414>
5d4: 00408825 move s1,v0
5d8: 8fb30030 lw s3,48(sp)
5dc: 8f990000 lw t9,0(gp)
5dc: R_MIPS_CALL16 __Balloc_D2A
5e0: 8e640004 lw a0,4(s3)
5e4: 0320f809 jalr t9
5e4: R_MIPS_JALR __Balloc_D2A
5e8: 00000000 nop
5ec: 8fbc0010 lw gp,16(sp)
5f0: 10400011 beqz v0,638 <__dtoa+0x638>
5f4: 0040b025 move s6,v0
5f8: 8e660010 lw a2,16(s3)
5fc: 8f990000 lw t9,0(gp)
5fc: R_MIPS_CALL16 memcpy
600: 24c60002 addiu a2,a2,2
604: 26c4000c addiu a0,s6,12
608: 00063080 sll a2,a2,0x2
60c: 0320f809 jalr t9
60c: R_MIPS_JALR memcpy
610: 2665000c addiu a1,s3,12
614: 8fbc0010 lw gp,16(sp)
618: 02c02025 move a0,s6
61c: 8f990000 lw t9,0(gp)
61c: R_MIPS_CALL16 __lshift_D2A
620: 00000000 nop
624: 0320f809 jalr t9
624: R_MIPS_JALR __lshift_D2A
628: 24050001 li a1,1
62c: 8fbc0010 lw gp,16(sp)
630: 14400133 bnez v0,b00 <__dtoa+0xb00>
634: 0040b025 move s6,v0
638: 1000ff76 b 414 <__dtoa+0x414>
63c: 00008825 move s1,zero
640: 468010a1 cvt.d.w $f2,$f2
644: 46201032 c.eq.d $f2,$f0
648: 00000000 nop
64c: 4501fee8 bc1t 1f0 <__dtoa+0x1f0>
650: 2e020017 sltiu v0,s0,23
654: 1000fee5 b 1ec <__dtoa+0x1ec>
658: 2610ffff addiu s0,s0,-1
65c: 24020002 li v0,2
660: 1642feff bne s2,v0,260 <__dtoa+0x260>
664: 00000000 nop
668: afa00034 sw zero,52(sp)
66c: 8fa20084 lw v0,132(sp)
670: 00000000 nop
674: 184002d2 blez v0,11c0 <__dtoa+0x11c0>
678: 24040001 li a0,1
67c: 00402025 move a0,v0
680: afa20040 sw v0,64(sp)
684: afa20028 sw v0,40(sp)
688: 8f990000 lw t9,0(gp)
688: R_MIPS_CALL16 __rv_alloc_D2A
68c: 00000000 nop
690: 0320f809 jalr t9
690: R_MIPS_JALR __rv_alloc_D2A
694: 00000000 nop
698: 8fbc0010 lw gp,16(sp)
69c: 1040ffe6 beqz v0,638 <__dtoa+0x638>
6a0: 00408825 move s1,v0
6a4: 2a420002 slti v0,s2,2
6a8: 14400004 bnez v0,6bc <__dtoa+0x6bc>
6ac: 24020001 li v0,1
6b0: 12820002 beq s4,v0,6bc <__dtoa+0x6bc>
6b4: 00000000 nop
6b8: afa00034 sw zero,52(sp)
6bc: 8fa20028 lw v0,40(sp)
6c0: 00000000 nop
6c4: 2c42000f sltiu v0,v0,15
6c8: 104001b2 beqz v0,d94 <__dtoa+0xd94>
6cc: 00000000 nop
6d0: 12e001b0 beqz s7,d94 <__dtoa+0xd94>
6d4: 00000000 nop
6d8: 1a0002e0 blez s0,125c <__dtoa+0x125c>
6dc: 3203000f andi v1,s0,0xf
6e0: 000320c0 sll a0,v1,0x3
6e4: 8f830000 lw v1,0(gp)
6e4: R_MIPS_GOT16 __tens_D2A
6e8: 00101102 srl v0,s0,0x4
6ec: 00641821 addu v1,v1,a0
6f0: c4620004 lwc1 $f2,4(v1)
6f4: 30440010 andi a0,v0,0x10
6f8: c4630000 lwc1 $f3,0(v1)
6fc: 1080030a beqz a0,1328 <__dtoa+0x1328>
700: 00000000 nop
704: 8f830000 lw v1,0(gp)
704: R_MIPS_GOT16 __bigtens_D2A
708: c7a40024 lwc1 $f4,36(sp)
70c: c4600024 lwc1 $f0,36(v1)
710: c7a50020 lwc1 $f5,32(sp)
714: c4610020 lwc1 $f1,32(v1)
718: 3042000f andi v0,v0,0xf
71c: 46202003 div.d $f0,$f4,$f0
720: 24080003 li t0,3
724: 1040000b beqz v0,754 <__dtoa+0x754>
728: 00000000 nop
72c: 8f830000 lw v1,0(gp)
72c: R_MIPS_GOT16 __bigtens_D2A
730: 30440001 andi a0,v0,0x1
734: 10800005 beqz a0,74c <__dtoa+0x74c>
738: 00021042 srl v0,v0,0x1
73c: c4640004 lwc1 $f4,4(v1)
740: 25080001 addiu t0,t0,1
744: c4650000 lwc1 $f5,0(v1)
748: 46241082 mul.d $f2,$f2,$f4
74c: 1440fff8 bnez v0,730 <__dtoa+0x730>
750: 24630008 addiu v1,v1,8
754: 46220003 div.d $f0,$f0,$f2
758: 8fa2003c lw v0,60(sp)
75c: 00000000 nop
760: 10400009 beqz v0,788 <__dtoa+0x788>
764: 00000000 nop
768: 8f820000 lw v0,0(gp)
768: R_MIPS_GOT16 $LC8
76c: 00000000 nop
770: c4420004 lwc1 $f2,4(v0)
770: R_MIPS_LO16 $LC8
774: c4430000 lwc1 $f3,0(v0)
774: R_MIPS_LO16 $LC8
778: 4622003c c.lt.d $f0,$f2
77c: 00000000 nop
780: 45010345 bc1t 1498 <__dtoa+0x1498>
784: 00000000 nop
788: 44881000 mtc1 t0,$f2
78c: 8f820000 lw v0,0(gp)
78c: R_MIPS_GOT16 $LC10
790: 468010a1 cvt.d.w $f2,$f2
794: 46201082 mul.d $f2,$f2,$f0
798: c4440004 lwc1 $f4,4(v0)
798: R_MIPS_LO16 $LC10
79c: c4450000 lwc1 $f5,0(v0)
79c: R_MIPS_LO16 $LC10
7a0: 46241080 add.d $f2,$f2,$f4
7a4: 44031000 mfc1 v1,$f2
7a8: 44021800 mfc1 v0,$f3
7ac: 00602825 move a1,v1
7b0: 3c03fcc0 lui v1,0xfcc0
7b4: 00432021 addu a0,v0,v1
7b8: 8fa20028 lw v0,40(sp)
7bc: 00000000 nop
7c0: 10400160 beqz v0,d44 <__dtoa+0xd44>
7c4: 02004025 move t0,s0
7c8: 8fa90028 lw t1,40(sp)
7cc: 00000000 nop
7d0: 2523ffff addiu v1,t1,-1
7d4: 8f8a0000 lw t2,0(gp)
7d4: R_MIPS_GOT16 __tens_D2A
7d8: 000318c0 sll v1,v1,0x3
7dc: 4446f800 cfc1 a2,$31
7e0: 4446f800 cfc1 a2,$31
7e4: 00000000 nop
7e8: 34c10003 ori at,a2,0x3
7ec: 38210002 xori at,at,0x2
7f0: 44c1f800 ctc1 at,$31
7f4: 00000000 nop
7f8: 462000a4 cvt.w.d $f2,$f0
7fc: 44c6f800 ctc1 a2,$31
800: 00000000 nop
804: 01431821 addu v1,t2,v1
808: c4640004 lwc1 $f4,4(v1)
80c: 44021000 mfc1 v0,$f2
810: 44854000 mtc1 a1,$f8
814: 24420030 addiu v0,v0,48
818: c4650000 lwc1 $f5,0(v1)
81c: 8fa30034 lw v1,52(sp)
820: 468011a1 cvt.d.w $f6,$f2
824: 00021600 sll v0,v0,0x18
828: 44844800 mtc1 a0,$f9
82c: 46260001 sub.d $f0,$f0,$f6
830: 00021603 sra v0,v0,0x18
834: 106002d7 beqz v1,1394 <__dtoa+0x1394>
838: 26370001 addiu s7,s1,1
83c: 8f8a0000 lw t2,0(gp)
83c: R_MIPS_GOT16 $LC12
840: 00000000 nop
844: c5420004 lwc1 $f2,4(t2)
844: R_MIPS_LO16 $LC12
848: c5430000 lwc1 $f3,0(t2)
848: R_MIPS_LO16 $LC12
84c: 46241083 div.d $f2,$f2,$f4
850: 46281081 sub.d $f2,$f2,$f8
854: 4622003c c.lt.d $f0,$f2
858: 00000000 nop
85c: 45010030 bc1t 920 <__dtoa+0x920>
860: a2220000 sb v0,0(s1)
864: 8f840000 lw a0,0(gp)
864: R_MIPS_GOT16 $LC8
868: 00000000 nop
86c: c4880004 lwc1 $f8,4(a0)
86c: R_MIPS_LO16 $LC8
870: c4890000 lwc1 $f9,0(a0)
870: R_MIPS_LO16 $LC8
874: 46204101 sub.d $f4,$f8,$f0
878: 4622203c c.lt.d $f4,$f2
87c: 00000000 nop
880: 45010366 bc1t 161c <__dtoa+0x161c>
884: 00000000 nop
888: 24020001 li v0,1
88c: 11220141 beq t1,v0,d94 <__dtoa+0xd94>
890: 02294821 addu t1,s1,t1
894: 8f850000 lw a1,0(gp)
894: R_MIPS_GOT16 $LC9
898: 00000000 nop
89c: c4a40004 lwc1 $f4,4(a1)
89c: R_MIPS_LO16 $LC9
8a0: c4a50000 lwc1 $f5,0(a1)
8a0: R_MIPS_LO16 $LC9
8a4: 10000009 b 8cc <__dtoa+0x8cc>
8a8: 46240002 mul.d $f0,$f0,$f4
8ac: 46204181 sub.d $f6,$f8,$f0
8b0: 4622303c c.lt.d $f6,$f2
8b4: 00000000 nop
8b8: 45010358 bc1t 161c <__dtoa+0x161c>
8bc: 00000000 nop
8c0: 11370134 beq t1,s7,d94 <__dtoa+0xd94>
8c4: 00000000 nop
8c8: 46240002 mul.d $f0,$f0,$f4
8cc: 46241082 mul.d $f2,$f2,$f4
8d0: 26f70001 addiu s7,s7,1
8d4: 4442f800 cfc1 v0,$31
8d8: 4442f800 cfc1 v0,$31
8dc: 00000000 nop
8e0: 34410003 ori at,v0,0x3
8e4: 38210002 xori at,at,0x2
8e8: 44c1f800 ctc1 at,$31
8ec: 00000000 nop
8f0: 462001a4 cvt.w.d $f6,$f0
8f4: 44c2f800 ctc1 v0,$31
8f8: 00000000 nop
8fc: 44023000 mfc1 v0,$f6
900: 468031a1 cvt.d.w $f6,$f6
904: 46260001 sub.d $f0,$f0,$f6
908: 24420030 addiu v0,v0,48
90c: 00021600 sll v0,v0,0x18
910: 4622003c c.lt.d $f0,$f2
914: 00021603 sra v0,v0,0x18
918: 4500ffe4 bc1f 8ac <__dtoa+0x8ac>
91c: a2e2ffff sb v0,-1(s7)
920: 1000fe8c b 354 <__dtoa+0x354>
924: 01008025 move s0,t0
928: 2403ffff li v1,-1
92c: afa00084 sw zero,132(sp)
930: afa30040 sw v1,64(sp)
934: afa30028 sw v1,40(sp)
938: 8fa30030 lw v1,48(sp)
93c: 00000000 nop
940: 1060021b beqz v1,11b0 <__dtoa+0x11b0>
944: 00000000 nop
948: 24420433 addiu v0,v0,1075
94c: 8f990000 lw t9,0(gp)
94c: R_MIPS_CALL16 __i2b_D2A
950: 24040001 li a0,1
954: 02c2b821 addu s7,s6,v0
958: 0320f809 jalr t9
958: R_MIPS_JALR __i2b_D2A
95c: 02629821 addu s3,s3,v0
960: afa20030 sw v0,48(sp)
964: 8fbc0010 lw gp,16(sp)
968: 1040ff33 beqz v0,638 <__dtoa+0x638>
96c: 24020001 li v0,1
970: afa20034 sw v0,52(sp)
974: 1ac00009 blez s6,99c <__dtoa+0x99c>
978: 00000000 nop
97c: 1a600007 blez s3,99c <__dtoa+0x99c>
980: 0276182a slt v1,s3,s6
984: 10600002 beqz v1,990 <__dtoa+0x990>
988: 02c01025 move v0,s6
98c: 02601025 move v0,s3
990: 02e2b823 subu s7,s7,v0
994: 02c2b023 subu s6,s6,v0
998: 02629823 subu s3,s3,v0
99c: 12a00019 beqz s5,a04 <__dtoa+0xa04>
9a0: 00000000 nop
9a4: 8fa20034 lw v0,52(sp)
9a8: 8f990000 lw t9,0(gp)
9a8: R_MIPS_CALL16 __pow5mult_D2A
9ac: 1040017c beqz v0,fa0 <__dtoa+0xfa0>
9b0: 00000000 nop
9b4: 8fa40030 lw a0,48(sp)
9b8: 0320f809 jalr t9
9b8: R_MIPS_JALR __pow5mult_D2A
9bc: 02a02825 move a1,s5
9c0: afa20030 sw v0,48(sp)
9c4: 8fbc0010 lw gp,16(sp)
9c8: 1040ff1b beqz v0,638 <__dtoa+0x638>
9cc: 00402025 move a0,v0
9d0: 8f990000 lw t9,0(gp)
9d0: R_MIPS_CALL16 __mult_D2A
9d4: 00000000 nop
9d8: 0320f809 jalr t9
9d8: R_MIPS_JALR __mult_D2A
9dc: 03c02825 move a1,s8
9e0: 8fbc0010 lw gp,16(sp)
9e4: 1040ff14 beqz v0,638 <__dtoa+0x638>
9e8: 0040a825 move s5,v0
9ec: 8f990000 lw t9,0(gp)
9ec: R_MIPS_CALL16 __Bfree_D2A
9f0: 00000000 nop
9f4: 0320f809 jalr t9
9f4: R_MIPS_JALR __Bfree_D2A
9f8: 03c02025 move a0,s8
9fc: 8fbc0010 lw gp,16(sp)
a00: 02a0f025 move s8,s5
a04: 8f990000 lw t9,0(gp)
a04: R_MIPS_CALL16 __i2b_D2A
a08: 00000000 nop
a0c: 0320f809 jalr t9
a0c: R_MIPS_JALR __i2b_D2A
a10: 24040001 li a0,1
a14: 8fbc0010 lw gp,16(sp)
a18: 1040ff07 beqz v0,638 <__dtoa+0x638>
a1c: 0040a825 move s5,v0
a20: 8fa50038 lw a1,56(sp)
a24: 00000000 nop
a28: 14a00142 bnez a1,f34 <__dtoa+0xf34>
a2c: 00000000 nop
a30: 2a420002 slti v0,s2,2
a34: 14400005 bnez v0,a4c <__dtoa+0xa4c>
a38: afa20044 sw v0,68(sp)
a3c: 8fa20034 lw v0,52(sp)
a40: 00000000 nop
a44: 10400004 beqz v0,a58 <__dtoa+0xa58>
a48: 00000000 nop
a4c: 24020001 li v0,1
a50: 128200a1 beq s4,v0,cd8 <__dtoa+0xcd8>
a54: 00000000 nop
a58: afa00048 sw zero,72(sp)
a5c: 8fa20038 lw v0,56(sp)
a60: 00000000 nop
a64: 144001c6 bnez v0,1180 <__dtoa+0x1180>
a68: 00000000 nop
a6c: 24020001 li v0,1
a70: 02621021 addu v0,s3,v0
a74: 3042001f andi v0,v0,0x1f
a78: 1040011d beqz v0,ef0 <__dtoa+0xef0>
a7c: 24030020 li v1,32
a80: 00621823 subu v1,v1,v0
a84: 28640005 slti a0,v1,5
a88: 14800314 bnez a0,16dc <__dtoa+0x16dc>
a8c: 24040004 li a0,4
a90: 2403001c li v1,28
a94: 00621023 subu v0,v1,v0
a98: 02e2b821 addu s7,s7,v0
a9c: 02c2b021 addu s6,s6,v0
aa0: 02629821 addu s3,s3,v0
aa4: 1ee0012c bgtz s7,f58 <__dtoa+0xf58>
aa8: 03c02025 move a0,s8
aac: 1e600133 bgtz s3,f7c <__dtoa+0xf7c>
ab0: 02a02025 move a0,s5
ab4: 8fa2003c lw v0,60(sp)
ab8: 00000000 nop
abc: 14400140 bnez v0,fc0 <__dtoa+0xfc0>
ac0: 00000000 nop
ac4: 8fa20028 lw v0,40(sp)
ac8: 00000000 nop
acc: 18400196 blez v0,1128 <__dtoa+0x1128>
ad0: 24020003 li v0,3
ad4: 8fa20034 lw v0,52(sp)
ad8: 00000000 nop
adc: 10400150 beqz v0,1020 <__dtoa+0x1020>
ae0: 00000000 nop
ae4: 1ec001fd bgtz s6,12dc <__dtoa+0x12dc>
ae8: 00000000 nop
aec: 8fa20048 lw v0,72(sp)
af0: 00000000 nop
af4: 1440feb8 bnez v0,5d8 <__dtoa+0x5d8>
af8: 00000000 nop
afc: 8fb60030 lw s6,48(sp)
b00: 8fa30028 lw v1,40(sp)
b04: 2622ffff addiu v0,s1,-1
b08: 00431021 addu v0,v0,v1
b0c: afa20038 sw v0,56(sp)
b10: 8fa20024 lw v0,36(sp)
b14: afb10034 sw s1,52(sp)
b18: 30420001 andi v0,v0,0x1
b1c: afa20040 sw v0,64(sp)
b20: 8f990000 lw t9,0(gp)
b20: R_MIPS_CALL16 __quorem_D2A
b24: 02a02825 move a1,s5
b28: 0320f809 jalr t9
b28: R_MIPS_JALR __quorem_D2A
b2c: 03c02025 move a0,s8
b30: 8fbc0010 lw gp,16(sp)
b34: 8fa50030 lw a1,48(sp)
b38: 8f990000 lw t9,0(gp)
b38: R_MIPS_CALL16 __cmp_D2A
b3c: 03c02025 move a0,s8
b40: afa2003c sw v0,60(sp)
b44: 0320f809 jalr t9
b44: R_MIPS_JALR __cmp_D2A
b48: 0040b825 move s7,v0
b4c: 8fbc0010 lw gp,16(sp)
b50: 02c02825 move a1,s6
b54: 8f990000 lw t9,0(gp)
b54: R_MIPS_CALL16 __diff_D2A
b58: 02a02025 move a0,s5
b5c: 0320f809 jalr t9
b5c: R_MIPS_JALR __diff_D2A
b60: 00409825 move s3,v0
b64: 00401825 move v1,v0
b68: 8fbc0010 lw gp,16(sp)
b6c: 1040feb2 beqz v0,638 <__dtoa+0x638>
b70: 26e90030 addiu t1,s7,48
b74: 8c42000c lw v0,12(v0)
b78: 00000000 nop
b7c: 144001ee bnez v0,1338 <__dtoa+0x1338>
b80: 00602825 move a1,v1
b84: 8f990000 lw t9,0(gp)
b84: R_MIPS_CALL16 __cmp_D2A
b88: afa90028 sw t1,40(sp)
b8c: 03c02025 move a0,s8
b90: 0320f809 jalr t9
b90: R_MIPS_JALR __cmp_D2A
b94: afa30020 sw v1,32(sp)
b98: 8fbc0010 lw gp,16(sp)
b9c: 8fa30020 lw v1,32(sp)
ba0: 8f990000 lw t9,0(gp)
ba0: R_MIPS_CALL16 __Bfree_D2A
ba4: 0040b825 move s7,v0
ba8: 0320f809 jalr t9
ba8: R_MIPS_JALR __Bfree_D2A
bac: 00602025 move a0,v1
bb0: 8fbc0010 lw gp,16(sp)
bb4: 8fa90028 lw t1,40(sp)
bb8: 16e0000a bnez s7,be4 <__dtoa+0xbe4>
bbc: 24020001 li v0,1
bc0: 12420008 beq s2,v0,be4 <__dtoa+0xbe4>
bc4: 00000000 nop
bc8: 8fa20040 lw v0,64(sp)
bcc: 00000000 nop
bd0: 14400004 bnez v0,be4 <__dtoa+0xbe4>
bd4: 00000000 nop
bd8: 168002b9 bnez s4,16c0 <__dtoa+0x16c0>
bdc: 24020039 li v0,57
be0: 0280b825 move s7,s4
be4: 06600009 bltz s3,c0c <__dtoa+0xc0c>
be8: 00000000 nop
bec: 166000c5 bnez s3,f04 <__dtoa+0xf04>
bf0: 24020001 li v0,1
bf4: 124200c3 beq s2,v0,f04 <__dtoa+0xf04>
bf8: 00000000 nop
bfc: 8fa20040 lw v0,64(sp)
c00: 00000000 nop
c04: 144000bf bnez v0,f04 <__dtoa+0xf04>
c08: 00000000 nop
c0c: 8fc30014 lw v1,20(s8)
c10: 00000000 nop
c14: 14600006 bnez v1,c30 <__dtoa+0xc30>
c18: 00000000 nop
c1c: 8fc30010 lw v1,16(s8)
c20: 00000000 nop
c24: 28630002 slti v1,v1,2
c28: 1460000b bnez v1,c58 <__dtoa+0xc58>
c2c: 00000000 nop
c30: 8fa20044 lw v0,68(sp)
c34: 00000000 nop
c38: 14400005 bnez v0,c50 <__dtoa+0xc50>
c3c: 00000000 nop
c40: 12800005 beqz s4,c58 <__dtoa+0xc58>
c44: 24020002 li v0,2
c48: 12820087 beq s4,v0,e68 <__dtoa+0xe68>
c4c: 00000000 nop
c50: 1ee0023f bgtz s7,1550 <__dtoa+0x1550>
c54: 03c02025 move a0,s8
c58: 8fa20034 lw v0,52(sp)
c5c: 00000000 nop
c60: 24570001 addiu s7,v0,1
c64: 8fa20034 lw v0,52(sp)
c68: 00000000 nop
c6c: a0490000 sb t1,0(v0)
c70: 8f990000 lw t9,0(gp)
c70: R_MIPS_CALL16 __Bfree_D2A
c74: 00000000 nop
c78: 0320f809 jalr t9
c78: R_MIPS_JALR __Bfree_D2A
c7c: 02a02025 move a0,s5
c80: 8fbc0010 lw gp,16(sp)
c84: 12c0fdb3 beqz s6,354 <__dtoa+0x354>
c88: 00000000 nop
c8c: 8fa40030 lw a0,48(sp)
c90: 00000000 nop
c94: 10800009 beqz a0,cbc <__dtoa+0xcbc>
c98: 00000000 nop
c9c: 12c40007 beq s6,a0,cbc <__dtoa+0xcbc>
ca0: 00000000 nop
ca4: 8f990000 lw t9,0(gp)
ca4: R_MIPS_CALL16 __Bfree_D2A
ca8: 00000000 nop
cac: 0320f809 jalr t9
cac: R_MIPS_JALR __Bfree_D2A
cb0: 00000000 nop
cb4: 8fbc0010 lw gp,16(sp)
cb8: 00000000 nop
cbc: 8f990000 lw t9,0(gp)
cbc: R_MIPS_CALL16 __Bfree_D2A
cc0: 00000000 nop
cc4: 0320f809 jalr t9
cc4: R_MIPS_JALR __Bfree_D2A
cc8: 02c02025 move a0,s6
ccc: 8fbc0010 lw gp,16(sp)
cd0: 1000fda0 b 354 <__dtoa+0x354>
cd4: 00000000 nop
cd8: 8fa50024 lw a1,36(sp)
cdc: 8fa40020 lw a0,32(sp)
ce0: 14a0ff5d bnez a1,a58 <__dtoa+0xa58>
ce4: 3c02000f lui v0,0xf
ce8: 3442ffff ori v0,v0,0xffff
cec: 00441024 and v0,v0,a0
cf0: 1440ff59 bnez v0,a58 <__dtoa+0xa58>
cf4: 3c027fe0 lui v0,0x7fe0
cf8: 00441024 and v0,v0,a0
cfc: 1040ff56 beqz v0,a58 <__dtoa+0xa58>
d00: 24020001 li v0,1
d04: 26f70001 addiu s7,s7,1
d08: 26730001 addiu s3,s3,1
d0c: 1000ff53 b a5c <__dtoa+0xa5c>
d10: afa20048 sw v0,72(sp)
d14: 44881000 mtc1 t0,$f2
d18: 8f820000 lw v0,0(gp)
d18: R_MIPS_GOT16 $LC10
d1c: 468010a1 cvt.d.w $f2,$f2
d20: 46201082 mul.d $f2,$f2,$f0
d24: c4440004 lwc1 $f4,4(v0)
d24: R_MIPS_LO16 $LC10
d28: c4450000 lwc1 $f5,0(v0)
d28: R_MIPS_LO16 $LC10
d2c: 46241080 add.d $f2,$f2,$f4
d30: 44031000 mfc1 v1,$f2
d34: 44021800 mfc1 v0,$f3
d38: 00602825 move a1,v1
d3c: 3c03fcc0 lui v1,0xfcc0
d40: 00432021 addu a0,v0,v1
d44: 8f820000 lw v0,0(gp)
d44: R_MIPS_GOT16 $LC11
d48: 00000000 nop
d4c: c4420004 lwc1 $f2,4(v0)
d4c: R_MIPS_LO16 $LC11
d50: c4430000 lwc1 $f3,0(v0)
d50: R_MIPS_LO16 $LC11
d54: 46220001 sub.d $f0,$f0,$f2
d58: 44851000 mtc1 a1,$f2
d5c: 44841800 mtc1 a0,$f3
d60: 00000000 nop
d64: 4620103c c.lt.d $f2,$f0
d68: 00000000 nop
d6c: 4501017a bc1t 1358 <__dtoa+0x1358>
d70: 3c088000 lui t0,0x8000
d74: 44851000 mtc1 a1,$f2
d78: 01041026 xor v0,t0,a0
d7c: 44821800 mtc1 v0,$f3
d80: 00000000 nop
d84: 4622003c c.lt.d $f0,$f2
d88: 00000000 nop
d8c: 45010021 bc1t e14 <__dtoa+0xe14>
d90: 00000000 nop
d94: 8fa20018 lw v0,24(sp)
d98: 00000000 nop
d9c: 0440002c bltz v0,e50 <__dtoa+0xe50>
da0: 2a03000f slti v1,s0,15
da4: 1060002a beqz v1,e50 <__dtoa+0xe50>
da8: 001018c0 sll v1,s0,0x3
dac: 8f820000 lw v0,0(gp)
dac: R_MIPS_GOT16 __tens_D2A
db0: 00000000 nop
db4: 00431021 addu v0,v0,v1
db8: c4440004 lwc1 $f4,4(v0)
dbc: c4450000 lwc1 $f5,0(v0)
dc0: 8fa20084 lw v0,132(sp)
dc4: 00000000 nop
dc8: 0441fd39 bgez v0,2b0 <__dtoa+0x2b0>
dcc: 00000000 nop
dd0: 8fa20028 lw v0,40(sp)
dd4: 00000000 nop
dd8: 1c40fd35 bgtz v0,2b0 <__dtoa+0x2b0>
ddc: 00000000 nop
de0: 1440000c bnez v0,e14 <__dtoa+0xe14>
de4: 00000000 nop
de8: 8f820000 lw v0,0(gp)
de8: R_MIPS_GOT16 $LC11
dec: 00000000 nop
df0: c4400004 lwc1 $f0,4(v0)
df0: R_MIPS_LO16 $LC11
df4: c4410000 lwc1 $f1,0(v0)
df4: R_MIPS_LO16 $LC11
df8: 46202102 mul.d $f4,$f4,$f0
dfc: c7a00024 lwc1 $f0,36(sp)
e00: c7a10020 lwc1 $f1,32(sp)
e04: 4624003e c.le.d $f0,$f4
e08: 00000000 nop
e0c: 45000153 bc1f 135c <__dtoa+0x135c>
e10: 0000a825 move s5,zero
e14: 8f990000 lw t9,0(gp)
e14: R_MIPS_CALL16 __Bfree_D2A
e18: 00000000 nop
e1c: 0320f809 jalr t9
e1c: R_MIPS_JALR __Bfree_D2A
e20: 00002025 move a0,zero
e24: 8fbc0010 lw gp,16(sp)
e28: 00000000 nop
e2c: 8f990000 lw t9,0(gp)
e2c: R_MIPS_CALL16 __Bfree_D2A
e30: 00000000 nop
e34: 0320f809 jalr t9
e34: R_MIPS_JALR __Bfree_D2A
e38: 03c02025 move a0,s8
e3c: 24020030 li v0,48
e40: 26370001 addiu s7,s1,1
e44: a2220000 sb v0,0(s1)
e48: 1000fd49 b 370 <__dtoa+0x370>
e4c: 24100001 li s0,1
e50: 8fa30034 lw v1,52(sp)
e54: 00000000 nop
e58: 1460feb7 bnez v1,938 <__dtoa+0x938>
e5c: 02c0b825 move s7,s6
e60: 1000fec4 b 974 <__dtoa+0x974>
e64: afa00030 sw zero,48(sp)
e68: 8fa20034 lw v0,52(sp)
e6c: 8fa30038 lw v1,56(sp)
e70: 24530001 addiu s3,v0,1
e74: 0260b825 move s7,s3
e78: 1062020e beq v1,v0,16b4 <__dtoa+0x16b4>
e7c: a0490000 sb t1,0(v0)
e80: 8f990000 lw t9,0(gp)
e80: R_MIPS_CALL16 __multadd_D2A
e84: 03c02025 move a0,s8
e88: 00003025 move a2,zero
e8c: 0320f809 jalr t9
e8c: R_MIPS_JALR __multadd_D2A
e90: 2405000a li a1,10
e94: 8fbc0010 lw gp,16(sp)
e98: 1040fde7 beqz v0,638 <__dtoa+0x638>
e9c: 0040f025 move s8,v0
ea0: 8fa20030 lw v0,48(sp)
ea4: 8f990000 lw t9,0(gp)
ea4: R_MIPS_CALL16 __multadd_D2A
ea8: 12c20116 beq s6,v0,1304 <__dtoa+0x1304>
eac: 00003025 move a2,zero
eb0: 8fa40030 lw a0,48(sp)
eb4: 0320f809 jalr t9
eb4: R_MIPS_JALR __multadd_D2A
eb8: 2405000a li a1,10
ebc: afa20030 sw v0,48(sp)
ec0: 8fbc0010 lw gp,16(sp)
ec4: 1040fddc beqz v0,638 <__dtoa+0x638>
ec8: 00003025 move a2,zero
ecc: 8f990000 lw t9,0(gp)
ecc: R_MIPS_CALL16 __multadd_D2A
ed0: 02c02025 move a0,s6
ed4: 0320f809 jalr t9
ed4: R_MIPS_JALR __multadd_D2A
ed8: 2405000a li a1,10
edc: 8fbc0010 lw gp,16(sp)
ee0: 1040fdd5 beqz v0,638 <__dtoa+0x638>
ee4: 0040b025 move s6,v0
ee8: 1000ff0d b b20 <__dtoa+0xb20>
eec: afb30034 sw s3,52(sp)
ef0: 2402001c li v0,28
ef4: 02e2b821 addu s7,s7,v0
ef8: 02c2b021 addu s6,s6,v0
efc: 1000fee9 b aa4 <__dtoa+0xaa4>
f00: 02629821 addu s3,s3,v0
f04: 1ae0ffd8 blez s7,e68 <__dtoa+0xe68>
f08: 00000000 nop
f0c: 8fa20034 lw v0,52(sp)
f10: 1280ff56 beqz s4,c6c <__dtoa+0xc6c>
f14: 24570001 addiu s7,v0,1
f18: 24020039 li v0,57
f1c: 112201de beq t1,v0,1698 <__dtoa+0x1698>
f20: 00000000 nop
f24: 8fa30034 lw v1,52(sp)
f28: 25220001 addiu v0,t1,1
f2c: 1000ff50 b c70 <__dtoa+0xc70>
f30: a0620000 sb v0,0(v1)
f34: 8f990000 lw t9,0(gp)
f34: R_MIPS_CALL16 __pow5mult_D2A
f38: 00000000 nop
f3c: 0320f809 jalr t9
f3c: R_MIPS_JALR __pow5mult_D2A
f40: 00402025 move a0,v0
f44: 8fbc0010 lw gp,16(sp)
f48: 1440feb9 bnez v0,a30 <__dtoa+0xa30>
f4c: 0040a825 move s5,v0
f50: 1000fd30 b 414 <__dtoa+0x414>
f54: 00008825 move s1,zero
f58: 8f990000 lw t9,0(gp)
f58: R_MIPS_CALL16 __lshift_D2A
f5c: 00000000 nop
f60: 0320f809 jalr t9
f60: R_MIPS_JALR __lshift_D2A
f64: 02e02825 move a1,s7
f68: 8fbc0010 lw gp,16(sp)
f6c: 1440fecf bnez v0,aac <__dtoa+0xaac>
f70: 0040f025 move s8,v0
f74: 1000fd27 b 414 <__dtoa+0x414>
f78: 00008825 move s1,zero
f7c: 8f990000 lw t9,0(gp)
f7c: R_MIPS_CALL16 __lshift_D2A
f80: 00000000 nop
f84: 0320f809 jalr t9
f84: R_MIPS_JALR __lshift_D2A
f88: 02602825 move a1,s3
f8c: 8fbc0010 lw gp,16(sp)
f90: 1440fec8 bnez v0,ab4 <__dtoa+0xab4>
f94: 0040a825 move s5,v0
f98: 1000fd1e b 414 <__dtoa+0x414>
f9c: 00008825 move s1,zero
fa0: 03c02025 move a0,s8
fa4: 0320f809 jalr t9
fa4: R_MIPS_JALR __pow5mult_D2A
fa8: 02a02825 move a1,s5
fac: 8fbc0010 lw gp,16(sp)
fb0: 1440fe94 bnez v0,a04 <__dtoa+0xa04>
fb4: 0040f025 move s8,v0
fb8: 1000fd16 b 414 <__dtoa+0x414>
fbc: 00008825 move s1,zero
fc0: 8f990000 lw t9,0(gp)
fc0: R_MIPS_CALL16 __cmp_D2A
fc4: 02a02825 move a1,s5
fc8: 0320f809 jalr t9
fc8: R_MIPS_JALR __cmp_D2A
fcc: 03c02025 move a0,s8
fd0: 8fbc0010 lw gp,16(sp)
fd4: 0441febb bgez v0,ac4 <__dtoa+0xac4>
fd8: 03c02025 move a0,s8
fdc: 8f990000 lw t9,0(gp)
fdc: R_MIPS_CALL16 __multadd_D2A
fe0: 00003025 move a2,zero
fe4: 0320f809 jalr t9
fe4: R_MIPS_JALR __multadd_D2A
fe8: 2405000a li a1,10
fec: 0040f025 move s8,v0
ff0: 8fbc0010 lw gp,16(sp)
ff4: 1040fd90 beqz v0,638 <__dtoa+0x638>
ff8: 2610ffff addiu s0,s0,-1
ffc: 8fa20034 lw v0,52(sp)
1000: 00000000 nop
1004: 1440018d bnez v0,163c <__dtoa+0x163c>
1008: 00003025 move a2,zero
100c: 8fa20040 lw v0,64(sp)
1010: 00000000 nop
1014: 18400042 blez v0,1120 <__dtoa+0x1120>
1018: 00000000 nop
101c: afa20028 sw v0,40(sp)
1020: 10000006 b 103c <__dtoa+0x103c>
1024: 0220b825 move s7,s1
1028: 0320f809 jalr t9
1028: R_MIPS_JALR __multadd_D2A
102c: 00000000 nop
1030: 8fbc0010 lw gp,16(sp)
1034: 1040fd80 beqz v0,638 <__dtoa+0x638>
1038: 0040f025 move s8,v0
103c: 8f990000 lw t9,0(gp)
103c: R_MIPS_CALL16 __quorem_D2A
1040: 03c02025 move a0,s8
1044: 0320f809 jalr t9
1044: R_MIPS_JALR __quorem_D2A
1048: 02a02825 move a1,s5
104c: 24490030 addiu t1,v0,48
1050: 26f70001 addiu s7,s7,1
1054: 8fbc0010 lw gp,16(sp)
1058: a2e9ffff sb t1,-1(s7)
105c: 8fa30028 lw v1,40(sp)
1060: 8fc80014 lw t0,20(s8)
1064: 02f11023 subu v0,s7,s1
1068: 03c02025 move a0,s8
106c: 00003025 move a2,zero
1070: 2405000a li a1,10
1074: 8f990000 lw t9,0(gp)
1074: R_MIPS_CALL16 __multadd_D2A
1078: 15000006 bnez t0,1094 <__dtoa+0x1094>
107c: 0043102a slt v0,v0,v1
1080: 8fc80010 lw t0,16(s8)
1084: 00000000 nop
1088: 29080002 slti t0,t0,2
108c: 1500012d bnez t0,1544 <__dtoa+0x1544>
1090: 00000000 nop
1094: 1440ffe4 bnez v0,1028 <__dtoa+0x1028>
1098: 00009025 move s2,zero
109c: 12800151 beqz s4,15e4 <__dtoa+0x15e4>
10a0: afa90020 sw t1,32(sp)
10a4: 24020002 li v0,2
10a8: 1282000f beq s4,v0,10e8 <__dtoa+0x10e8>
10ac: 00000000 nop
10b0: 8f990000 lw t9,0(gp)
10b0: R_MIPS_CALL16 __lshift_D2A
10b4: 03c02025 move a0,s8
10b8: 0320f809 jalr t9
10b8: R_MIPS_JALR __lshift_D2A
10bc: 24050001 li a1,1
10c0: 8fbc0010 lw gp,16(sp)
10c4: 02a02825 move a1,s5
10c8: 8f990000 lw t9,0(gp)
10c8: R_MIPS_CALL16 __cmp_D2A
10cc: 00402025 move a0,v0
10d0: 0320f809 jalr t9
10d0: R_MIPS_JALR __cmp_D2A
10d4: 0040f025 move s8,v0
10d8: 8fbc0010 lw gp,16(sp)
10dc: 8fa90020 lw t1,32(sp)
10e0: 18400164 blez v0,1674 <__dtoa+0x1674>
10e4: 00000000 nop
10e8: 82e4ffff lb a0,-1(s7)
10ec: 8fb60030 lw s6,48(sp)
10f0: afb20030 sw s2,48(sp)
10f4: 10000005 b 110c <__dtoa+0x110c>
10f8: 24050039 li a1,57
10fc: 12220143 beq s1,v0,160c <__dtoa+0x160c>
1100: 00000000 nop
1104: 8044ffff lb a0,-1(v0)
1108: 0040b825 move s7,v0
110c: 1085fffb beq a0,a1,10fc <__dtoa+0x10fc>
1110: 26e2ffff addiu v0,s7,-1
1114: 24840001 addiu a0,a0,1
1118: 1000fed5 b c70 <__dtoa+0xc70>
111c: a0440000 sb a0,0(v0)
1120: afa20028 sw v0,40(sp)
1124: 24020003 li v0,3
1128: 12420003 beq s2,v0,1138 <__dtoa+0x1138>
112c: 24020005 li v0,5
1130: 1642fe68 bne s2,v0,ad4 <__dtoa+0xad4>
1134: 00000000 nop
1138: 8fa20028 lw v0,40(sp)
113c: 00000000 nop
1140: 104000f0 beqz v0,1504 <__dtoa+0x1504>
1144: 02a02025 move a0,s5
1148: 8f990000 lw t9,0(gp)
1148: R_MIPS_CALL16 __Bfree_D2A
114c: 00000000 nop
1150: 0320f809 jalr t9
1150: R_MIPS_JALR __Bfree_D2A
1154: 02a02025 move a0,s5
1158: 8fa20084 lw v0,132(sp)
115c: 8fbc0010 lw gp,16(sp)
1160: 00028027 nor s0,zero,v0
1164: 8fa20030 lw v0,48(sp)
1168: 00000000 nop
116c: 1040ff2f beqz v0,e2c <__dtoa+0xe2c>
1170: 00000000 nop
1174: 8fb60030 lw s6,48(sp)
1178: 1000fed0 b cbc <__dtoa+0xcbc>
117c: 0220b825 move s7,s1
1180: 8ea20010 lw v0,16(s5)
1184: 8f990000 lw t9,0(gp)
1184: R_MIPS_CALL16 __hi0bits_D2A
1188: 24420003 addiu v0,v0,3
118c: 00021080 sll v0,v0,0x2
1190: 02a21021 addu v0,s5,v0
1194: 8c440004 lw a0,4(v0)
1198: 0320f809 jalr t9
1198: R_MIPS_JALR __hi0bits_D2A
119c: 00000000 nop
11a0: 24030020 li v1,32
11a4: 8fbc0010 lw gp,16(sp)
11a8: 1000fe31 b a70 <__dtoa+0xa70>
11ac: 00621023 subu v0,v1,v0
11b0: 8fa3001c lw v1,28(sp)
11b4: 24020036 li v0,54
11b8: 1000fde4 b 94c <__dtoa+0x94c>
11bc: 00431023 subu v0,v0,v1
11c0: 24020001 li v0,1
11c4: afa20040 sw v0,64(sp)
11c8: afa20028 sw v0,40(sp)
11cc: 1000fd2e b 688 <__dtoa+0x688>
11d0: afa20084 sw v0,132(sp)
11d4: 2a520002 slti s2,s2,2
11d8: 16400005 bnez s2,11f0 <__dtoa+0x11f0>
11dc: 00000000 nop
11e0: 1280fc5c beqz s4,354 <__dtoa+0x354>
11e4: 24050002 li a1,2
11e8: 12850012 beq s4,a1,1234 <__dtoa+0x1234>
11ec: 24050039 li a1,57
11f0: 46200000 add.d $f0,$f0,$f0
11f4: 4620203c c.lt.d $f4,$f0
11f8: 00000000 nop
11fc: 4501000d bc1t 1234 <__dtoa+0x1234>
1200: 24050039 li a1,57
1204: 46240032 c.eq.d $f0,$f4
1208: 00000000 nop
120c: 4500fc51 bc1f 354 <__dtoa+0x354>
1210: 30840001 andi a0,a0,0x1
1214: 1080fc4f beqz a0,354 <__dtoa+0x354>
1218: 00000000 nop
121c: 10000005 b 1234 <__dtoa+0x1234>
1220: 24050039 li a1,57
1224: 10910092 beq a0,s1,1470 <__dtoa+0x1470>
1228: 24020030 li v0,48
122c: 8082ffff lb v0,-1(a0)
1230: 0080b825 move s7,a0
1234: 1045fffb beq v0,a1,1224 <__dtoa+0x1224>
1238: 26e4ffff addiu a0,s7,-1
123c: 24420001 addiu v0,v0,1
1240: 1000fc44 b 354 <__dtoa+0x354>
1244: a0820000 sb v0,0(a0)
1248: 24020001 li v0,1
124c: 1000fd07 b 66c <__dtoa+0x66c>
1250: afa20034 sw v0,52(sp)
1254: 1000fc96 b 4b0 <__dtoa+0x4b0>
1258: afa00034 sw zero,52(sp)
125c: 1200008a beqz s0,1488 <__dtoa+0x1488>
1260: 00000000 nop
1264: 00101823 negu v1,s0
1268: 3062000f andi v0,v1,0xf
126c: 000220c0 sll a0,v0,0x3
1270: 8f820000 lw v0,0(gp)
1270: R_MIPS_GOT16 __tens_D2A
1274: c7a20024 lwc1 $f2,36(sp)
1278: 00441021 addu v0,v0,a0
127c: c4400004 lwc1 $f0,4(v0)
1280: c7a30020 lwc1 $f3,32(sp)
1284: c4410000 lwc1 $f1,0(v0)
1288: 00031903 sra v1,v1,0x4
128c: 10600107 beqz v1,16ac <__dtoa+0x16ac>
1290: 46201002 mul.d $f0,$f2,$f0
1294: 8f840000 lw a0,0(gp)
1294: R_MIPS_GOT16 __bigtens_D2A
1298: 46200086 mov.d $f2,$f0
129c: 00001025 move v0,zero
12a0: 24080002 li t0,2
12a4: 30650001 andi a1,v1,0x1
12a8: 10a00006 beqz a1,12c4 <__dtoa+0x12c4>
12ac: 00031843 sra v1,v1,0x1
12b0: c4840004 lwc1 $f4,4(a0)
12b4: 25080001 addiu t0,t0,1
12b8: c4850000 lwc1 $f5,0(a0)
12bc: 24020001 li v0,1
12c0: 46241082 mul.d $f2,$f2,$f4
12c4: 1460fff7 bnez v1,12a4 <__dtoa+0x12a4>
12c8: 24840008 addiu a0,a0,8
12cc: 1040fd22 beqz v0,758 <__dtoa+0x758>
12d0: 00000000 nop
12d4: 1000fd20 b 758 <__dtoa+0x758>
12d8: 46201006 mov.d $f0,$f2
12dc: 8f990000 lw t9,0(gp)
12dc: R_MIPS_CALL16 __lshift_D2A
12e0: 8fa40030 lw a0,48(sp)
12e4: 0320f809 jalr t9
12e4: R_MIPS_JALR __lshift_D2A
12e8: 02c02825 move a1,s6
12ec: afa20030 sw v0,48(sp)
12f0: 8fbc0010 lw gp,16(sp)
12f4: 1440fdfd bnez v0,aec <__dtoa+0xaec>
12f8: 00000000 nop
12fc: 1000fc45 b 414 <__dtoa+0x414>
1300: 00008825 move s1,zero
1304: 02c02025 move a0,s6
1308: 0320f809 jalr t9
1308: R_MIPS_JALR __multadd_D2A
130c: 2405000a li a1,10
1310: 8fbc0010 lw gp,16(sp)
1314: 1040fcc8 beqz v0,638 <__dtoa+0x638>
1318: 0040b025 move s6,v0
131c: afa20030 sw v0,48(sp)
1320: 1000fdff b b20 <__dtoa+0xb20>
1324: afb30034 sw s3,52(sp)
1328: c7a00024 lwc1 $f0,36(sp)
132c: c7a10020 lwc1 $f1,32(sp)
1330: 1000fcfc b 724 <__dtoa+0x724>
1334: 24080002 li t0,2
1338: 8f990000 lw t9,0(gp)
1338: R_MIPS_CALL16 __Bfree_D2A
133c: afa90020 sw t1,32(sp)
1340: 0320f809 jalr t9
1340: R_MIPS_JALR __Bfree_D2A
1344: 00602025 move a0,v1
1348: 8fbc0010 lw gp,16(sp)
134c: 8fa90020 lw t1,32(sp)
1350: 1000fe24 b be4 <__dtoa+0xbe4>
1354: 24170001 li s7,1
1358: 0000a825 move s5,zero
135c: 0000b025 move s6,zero
1360: 24020031 li v0,49
1364: 26370001 addiu s7,s1,1
1368: a2220000 sb v0,0(s1)
136c: 26100001 addiu s0,s0,1
1370: 8f990000 lw t9,0(gp)
1370: R_MIPS_CALL16 __Bfree_D2A
1374: 00000000 nop
1378: 0320f809 jalr t9
1378: R_MIPS_JALR __Bfree_D2A
137c: 02a02025 move a0,s5
1380: 8fbc0010 lw gp,16(sp)
1384: 16c0fe4d bnez s6,cbc <__dtoa+0xcbc>
1388: 00000000 nop
138c: 1000fbf1 b 354 <__dtoa+0x354>
1390: 00000000 nop
1394: 44803000 mtc1 zero,$f6
1398: 44803800 mtc1 zero,$f7
139c: 00000000 nop
13a0: 46260032 c.eq.d $f0,$f6
13a4: 00000000 nop
13a8: 45010022 bc1t 1434 <__dtoa+0x1434>
13ac: 46282082 mul.d $f2,$f4,$f8
13b0: 24040001 li a0,1
13b4: 112400cd beq t1,a0,16ec <__dtoa+0x16ec>
13b8: a2220000 sb v0,0(s1)
13bc: 8f850000 lw a1,0(gp)
13bc: R_MIPS_GOT16 $LC9
13c0: 00000000 nop
13c4: c4a80004 lwc1 $f8,4(a1)
13c4: R_MIPS_LO16 $LC9
13c8: c4a90000 lwc1 $f9,0(a1)
13c8: R_MIPS_LO16 $LC9
13cc: 46280002 mul.d $f0,$f0,$f8
13d0: 26e50001 addiu a1,s7,1
13d4: 4442f800 cfc1 v0,$31
13d8: 4442f800 cfc1 v0,$31
13dc: 00000000 nop
13e0: 34410003 ori at,v0,0x3
13e4: 38210002 xori at,at,0x2
13e8: 44c1f800 ctc1 at,$31
13ec: 00000000 nop
13f0: 46200124 cvt.w.d $f4,$f0
13f4: 44c2f800 ctc1 v0,$31
13f8: 00000000 nop
13fc: 44022000 mfc1 v0,$f4
1400: 46802121 cvt.d.w $f4,$f4
1404: 46240001 sub.d $f0,$f0,$f4
1408: 24420030 addiu v0,v0,48
140c: 46260032 c.eq.d $f0,$f6
1410: 00021600 sll v0,v0,0x18
1414: 45010009 bc1t 143c <__dtoa+0x143c>
1418: 00021603 sra v0,v0,0x18
141c: 00b12023 subu a0,a1,s1
1420: 00a0b825 move s7,a1
1424: 1489ffe9 bne a0,t1,13cc <__dtoa+0x13cc>
1428: a0a2ffff sb v0,-1(a1)
142c: 10000004 b 1440 <__dtoa+0x1440>
1430: 00000000 nop
1434: 02e02825 move a1,s7
1438: 0220b825 move s7,s1
143c: a2e20000 sb v0,0(s7)
1440: 8f820000 lw v0,0(gp)
1440: R_MIPS_GOT16 $LC12
1444: 00000000 nop
1448: c4440004 lwc1 $f4,4(v0)
1448: R_MIPS_LO16 $LC12
144c: c4450000 lwc1 $f5,0(v0)
144c: R_MIPS_LO16 $LC12
1450: 46241180 add.d $f6,$f2,$f4
1454: 4620303c c.lt.d $f6,$f0
1458: 00000000 nop
145c: 45000052 bc1f 15a8 <__dtoa+0x15a8>
1460: 00a0b825 move s7,a1
1464: 80a2ffff lb v0,-1(a1)
1468: 1000ff6c b 121c <__dtoa+0x121c>
146c: 01008025 move s0,t0
1470: a2220000 sb v0,0(s1)
1474: 82e2ffff lb v0,-1(s7)
1478: 26100001 addiu s0,s0,1
147c: 24420001 addiu v0,v0,1
1480: 1000fbb4 b 354 <__dtoa+0x354>
1484: a0820000 sb v0,0(a0)
1488: c7a00024 lwc1 $f0,36(sp)
148c: c7a10020 lwc1 $f1,32(sp)
1490: 1000fcb1 b 758 <__dtoa+0x758>
1494: 24080002 li t0,2
1498: 8fa20028 lw v0,40(sp)
149c: 00000000 nop
14a0: 1040fe1c beqz v0,d14 <__dtoa+0xd14>
14a4: 00000000 nop
14a8: 8fa90040 lw t1,64(sp)
14ac: 00000000 nop
14b0: 1920fe38 blez t1,d94 <__dtoa+0xd94>
14b4: 25080001 addiu t0,t0,1
14b8: 8f850000 lw a1,0(gp)
14b8: R_MIPS_GOT16 $LC9
14bc: 00000000 nop
14c0: c4a40004 lwc1 $f4,4(a1)
14c0: R_MIPS_LO16 $LC9
14c4: 44881000 mtc1 t0,$f2
14c8: c4a50000 lwc1 $f5,0(a1)
14c8: R_MIPS_LO16 $LC9
14cc: 8f820000 lw v0,0(gp)
14cc: R_MIPS_GOT16 $LC10
14d0: 46240002 mul.d $f0,$f0,$f4
14d4: 468010a1 cvt.d.w $f2,$f2
14d8: c4440004 lwc1 $f4,4(v0)
14d8: R_MIPS_LO16 $LC10
14dc: 2608ffff addiu t0,s0,-1
14e0: c4450000 lwc1 $f5,0(v0)
14e0: R_MIPS_LO16 $LC10
14e4: 46201082 mul.d $f2,$f2,$f0
14e8: 46241080 add.d $f2,$f2,$f4
14ec: 44031000 mfc1 v1,$f2
14f0: 44021800 mfc1 v0,$f3
14f4: 00602825 move a1,v1
14f8: 3c03fcc0 lui v1,0xfcc0
14fc: 1000fcb4 b 7d0 <__dtoa+0x7d0>
1500: 00432021 addu a0,v0,v1
1504: 8f990000 lw t9,0(gp)
1504: R_MIPS_CALL16 __multadd_D2A
1508: 00003025 move a2,zero
150c: 0320f809 jalr t9
150c: R_MIPS_JALR __multadd_D2A
1510: 24050005 li a1,5
1514: 8fbc0010 lw gp,16(sp)
1518: 00402825 move a1,v0
151c: 8f990000 lw t9,0(gp)
151c: R_MIPS_CALL16 __cmp_D2A
1520: 03c02025 move a0,s8
1524: 0320f809 jalr t9
1524: R_MIPS_JALR __cmp_D2A
1528: 0040a825 move s5,v0
152c: 8fbc0010 lw gp,16(sp)
1530: 1840ff05 blez v0,1148 <__dtoa+0x1148>
1534: 24020031 li v0,49
1538: 8fb60030 lw s6,48(sp)
153c: 1000ff8a b 1368 <__dtoa+0x1368>
1540: 26370001 addiu s7,s1,1
1544: 8fb60030 lw s6,48(sp)
1548: 1000ff89 b 1370 <__dtoa+0x1370>
154c: 00000000 nop
1550: 8f990000 lw t9,0(gp)
1550: R_MIPS_CALL16 __lshift_D2A
1554: afa90020 sw t1,32(sp)
1558: 0320f809 jalr t9
1558: R_MIPS_JALR __lshift_D2A
155c: 24050001 li a1,1
1560: 8fbc0010 lw gp,16(sp)
1564: 1040fc34 beqz v0,638 <__dtoa+0x638>
1568: 0040f025 move s8,v0
156c: 8f990000 lw t9,0(gp)
156c: R_MIPS_CALL16 __cmp_D2A
1570: 02a02825 move a1,s5
1574: 0320f809 jalr t9
1574: R_MIPS_JALR __cmp_D2A
1578: 00402025 move a0,v0
157c: 8fa30034 lw v1,52(sp)
1580: 8fbc0010 lw gp,16(sp)
1584: 8fa90020 lw t1,32(sp)
1588: 18400026 blez v0,1624 <__dtoa+0x1624>
158c: 24770001 addiu s7,v1,1
1590: 24020039 li v0,57
1594: 11220040 beq t1,v0,1698 <__dtoa+0x1698>
1598: 00000000 nop
159c: 8fa2003c lw v0,60(sp)
15a0: 1000fdb0 b c64 <__dtoa+0xc64>
15a4: 24490031 addiu t1,v0,49
15a8: 46222101 sub.d $f4,$f4,$f2
15ac: 4624003c c.lt.d $f0,$f4
15b0: 00000000 nop
15b4: 4500fdf7 bc1f d94 <__dtoa+0xd94>
15b8: 24040030 li a0,48
15bc: 10000002 b 15c8 <__dtoa+0x15c8>
15c0: 00000000 nop
15c4: 00602825 move a1,v1
15c8: 80a2ffff lb v0,-1(a1)
15cc: 00000000 nop
15d0: 1044fffc beq v0,a0,15c4 <__dtoa+0x15c4>
15d4: 24a3ffff addiu v1,a1,-1
15d8: 00a0b825 move s7,a1
15dc: 1000fb5d b 354 <__dtoa+0x354>
15e0: 01008025 move s0,t0
15e4: 82e4ffff lb a0,-1(s7)
15e8: 10000003 b 15f8 <__dtoa+0x15f8>
15ec: 24050030 li a1,48
15f0: 82e4fffe lb a0,-2(s7)
15f4: 0040b825 move s7,v0
15f8: 1085fffd beq a0,a1,15f0 <__dtoa+0x15f0>
15fc: 26e2ffff addiu v0,s7,-1
1600: 8fb60030 lw s6,48(sp)
1604: 1000fd9a b c70 <__dtoa+0xc70>
1608: afb20030 sw s2,48(sp)
160c: 24020031 li v0,49
1610: 26100001 addiu s0,s0,1
1614: 1000fd96 b c70 <__dtoa+0xc70>
1618: a2220000 sb v0,0(s1)
161c: 1000feff b 121c <__dtoa+0x121c>
1620: 01008025 move s0,t0
1624: 1440fd8f bnez v0,c64 <__dtoa+0xc64>
1628: 31220001 andi v0,t1,0x1
162c: 1040fd8d beqz v0,c64 <__dtoa+0xc64>
1630: 24020039 li v0,57
1634: 1000ffd7 b 1594 <__dtoa+0x1594>
1638: 00000000 nop
163c: 8f990000 lw t9,0(gp)
163c: R_MIPS_CALL16 __multadd_D2A
1640: 8fa40030 lw a0,48(sp)
1644: 0320f809 jalr t9
1644: R_MIPS_JALR __multadd_D2A
1648: 2405000a li a1,10
164c: afa20030 sw v0,48(sp)
1650: 8fbc0010 lw gp,16(sp)
1654: 1040fbf8 beqz v0,638 <__dtoa+0x638>
1658: 00000000 nop
165c: 8fa20040 lw v0,64(sp)
1660: 00000000 nop
1664: 1840feae blez v0,1120 <__dtoa+0x1120>
1668: 00000000 nop
166c: 1000fd1d b ae4 <__dtoa+0xae4>
1670: afa20028 sw v0,40(sp)
1674: 82e4ffff lb a0,-1(s7)
1678: 1440ffdf bnez v0,15f8 <__dtoa+0x15f8>
167c: 24050030 li a1,48
1680: 31220001 andi v0,t1,0x1
1684: 1040ffdc beqz v0,15f8 <__dtoa+0x15f8>
1688: 00000000 nop
168c: 8fb60030 lw s6,48(sp)
1690: 1000fe98 b 10f4 <__dtoa+0x10f4>
1694: afb20030 sw s2,48(sp)
1698: 8fa30034 lw v1,52(sp)
169c: 24020039 li v0,57
16a0: a0620000 sb v0,0(v1)
16a4: 1000fe93 b 10f4 <__dtoa+0x10f4>
16a8: 24040039 li a0,57
16ac: 1000fc2a b 758 <__dtoa+0x758>
16b0: 24080002 li t0,2
16b4: 8fb20030 lw s2,48(sp)
16b8: 1000fe78 b 109c <__dtoa+0x109c>
16bc: afb60030 sw s6,48(sp)
16c0: 8fa30034 lw v1,52(sp)
16c4: 1122fff5 beq t1,v0,169c <__dtoa+0x169c>
16c8: 24770001 addiu s7,v1,1
16cc: 1e60ffb3 bgtz s3,159c <__dtoa+0x159c>
16d0: 00000000 nop
16d4: 1000fd63 b c64 <__dtoa+0xc64>
16d8: 00000000 nop
16dc: 1064fcf1 beq v1,a0,aa4 <__dtoa+0xaa4>
16e0: 2403003c li v1,60
16e4: 1000fe03 b ef4 <__dtoa+0xef4>
16e8: 00621023 subu v0,v1,v0
16ec: 1000ff54 b 1440 <__dtoa+0x1440>
16f0: 02e02825 move a1,s7
...
mirage-% rm obj.newsmips/dtoa.pico
mirage-% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/nbmake-newsmips CFLAGS+=-DTrust_FLT_ROUNDS dtoa.pico
# compile libc/dtoa.pico
/s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-gcc \
-DTrust_FLT_ROUNDS --sysroot=/s/netbsd-9/src/obj.newsmips/destdir.newsmips \
-D_LIBC -DLIBC_SCCS -DSYSLIBC_SCCS -D_REENTRANT -DHESIOD -DINET6 -DNLS -DYP \
-I/s/netbsd-9/src/lib/libc/include -I/s/netbsd-9/src/lib/libc -I. \
-I/s/netbsd-9/src/sys -I/s/netbsd-9/src/lib/libc/compat/../locale \
-I/s/netbsd-9/src/lib/libc/compat/stdlib -I/s/netbsd-9/src/lib/libc/compat/../stdlib \
-D__BUILD_LEGACY -D__HAVE_ASM_ATOMIC_CAS_UP -I/s/netbsd-9/src/lib/libc/../../common/lib/libc/quad \
-I/s/netbsd-9/src/lib/libc/../../common/lib/libc/string \
-I/s/netbsd-9/src/lib/libc/../../common/lib/libc/arch/mips/string \
-D__DBINTERFACE_PRIVATE -I/s/netbsd-9/src/libexec/ld.elf_so \
-I/s/netbsd-9/src/lib/libc/dlfcn -I/s/netbsd-9/src/lib/libc/gdtoa \
-I/s/netbsd-9/src/lib/libc/locale -DHonor_FLT_ROUNDS \
-I/s/netbsd-9/src/lib/libc/arch/mips/gdtoa -DWITH_RUNE \
-I/s/netbsd-9/src/lib/libc -DPOSIX_MISTAKE -DCOMPAT__RES -DUSE_POLL \
-DPORTMAP -DWIDE_DOUBLE -DUSG_COMPAT -c -D_I18N_DYNAMIC -fPIC \
/s/netbsd-9/src/lib/libc/gdtoa/dtoa.c -o dtoa.pico
/s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-objcopy -x dtoa.pico
mirage-% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-objdump -dr obj.newsmips/dtoa.pico
obj.newsmips/dtoa.pico: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <__dtoa>:
0: 3c1c0000 lui gp,0x0
0: R_MIPS_HI16 _gp_disp
4: 279c0000 addiu gp,gp,0
4: R_MIPS_LO16 _gp_disp
8: 0399e021 addu gp,gp,t9
c: 27bdff30 addiu sp,sp,-208
10: afbf00cc sw ra,204(sp)
14: afbe00c8 sw s8,200(sp)
18: afb100c4 sw s1,196(sp)
1c: afb000c0 sw s0,192(sp)
20: 03a0f025 move s8,sp
24: afbc0010 sw gp,16(sp)
28: e7cc00d4 swc1 $f12,212(s8)
2c: e7cd00d0 swc1 $f13,208(s8)
30: afc600d8 sw a2,216(s8)
34: afc700dc sw a3,220(s8)
38: afc00050 sw zero,80(s8)
3c: afc00054 sw zero,84(s8)
40: afc0006c sw zero,108(s8)
44: 8f820000 lw v0,0(gp)
44: R_MIPS_CALL16 __flt_rounds
48: 00000000 nop
4c: 0040c825 move t9,v0
50: 0320f809 jalr t9
50: R_MIPS_JALR __flt_rounds
54: 00000000 nop
58: 8fdc0010 lw gp,16(s8)
5c: afc2007c sw v0,124(s8)
60: c7c000d4 lwc1 $f0,212(s8)
64: 00000000 nop
68: c7c100d0 lwc1 $f1,208(s8)
6c: 00000000 nop
70: e7c000ac swc1 $f0,172(s8)
74: e7c100a8 swc1 $f1,168(s8)
78: 8fc200a8 lw v0,168(s8)
7c: 00000000 nop
80: 0441000b bgez v0,b0 <__dtoa+0xb0>
84: 00000000 nop
88: 8fc200e4 lw v0,228(s8)
8c: 24030001 li v1,1
90: ac430000 sw v1,0(v0)
94: 8fc300a8 lw v1,168(s8)
98: 3c027fff lui v0,0x7fff
9c: 3442ffff ori v0,v0,0xffff
a0: 00621024 and v0,v1,v0
a4: afc200a8 sw v0,168(s8)
a8: 10000004 b bc <__dtoa+0xbc>
ac: 00000000 nop
b0: 8fc200e4 lw v0,228(s8)
b4: 00000000 nop
b8: ac400000 sw zero,0(v0)
bc: 8fc300a8 lw v1,168(s8)
c0: 3c027ff0 lui v0,0x7ff0
c4: 00621824 and v1,v1,v0
c8: 3c027ff0 lui v0,0x7ff0
cc: 14620028 bne v1,v0,170 <__dtoa+0x170>
d0: 00000000 nop
d4: 8fc200e0 lw v0,224(s8)
d8: 2403270f li v1,9999
dc: ac430000 sw v1,0(v0)
e0: 8fc200ac lw v0,172(s8)
e4: 00000000 nop
e8: 14400014 bnez v0,13c <__dtoa+0x13c>
ec: 00000000 nop
f0: 8fc300a8 lw v1,168(s8)
f4: 3c02000f lui v0,0xf
f8: 3442ffff ori v0,v0,0xffff
fc: 00621024 and v0,v1,v0
100: 1440000e bnez v0,13c <__dtoa+0x13c>
104: 00000000 nop
108: 24060008 li a2,8
10c: 8fc500e8 lw a1,232(s8)
110: 8f820000 lw v0,0(gp)
110: R_MIPS_GOT16 .rodata
114: 00000000 nop
118: 24440000 addiu a0,v0,0
118: R_MIPS_LO16 .rodata
11c: 8f820000 lw v0,0(gp)
11c: R_MIPS_CALL16 __nrv_alloc_D2A
120: 00000000 nop
124: 0040c825 move t9,v0
128: 0320f809 jalr t9
128: R_MIPS_JALR __nrv_alloc_D2A
12c: 00000000 nop
130: 8fdc0010 lw gp,16(s8)
134: 100009f4 b 2908 <__dtoa+0x2908>
138: 00000000 nop
13c: 24060003 li a2,3
140: 8fc500e8 lw a1,232(s8)
144: 8f820000 lw v0,0(gp)
144: R_MIPS_GOT16 .rodata
148: 00000000 nop
14c: 2444000c addiu a0,v0,12
14c: R_MIPS_LO16 .rodata
150: 8f820000 lw v0,0(gp)
150: R_MIPS_CALL16 __nrv_alloc_D2A
154: 00000000 nop
158: 0040c825 move t9,v0
15c: 0320f809 jalr t9
15c: R_MIPS_JALR __nrv_alloc_D2A
160: 00000000 nop
164: 8fdc0010 lw gp,16(s8)
168: 100009e7 b 2908 <__dtoa+0x2908>
16c: 00000000 nop
170: c7c000ac lwc1 $f0,172(s8)
174: 00000000 nop
178: c7c100a8 lwc1 $f1,168(s8)
17c: 44801000 mtc1 zero,$f2
180: 00000000 nop
184: 44801800 mtc1 zero,$f3
188: 00000000 nop
18c: 46220032 c.eq.d $f0,$f2
190: 00000000 nop
194: 45000011 bc1f 1dc <__dtoa+0x1dc>
198: 00000000 nop
19c: 8fc200e0 lw v0,224(s8)
1a0: 24030001 li v1,1
1a4: ac430000 sw v1,0(v0)
1a8: 24060001 li a2,1
1ac: 8fc500e8 lw a1,232(s8)
1b0: 8f820000 lw v0,0(gp)
1b0: R_MIPS_GOT16 .rodata
1b4: 00000000 nop
1b8: 24440010 addiu a0,v0,16
1b8: R_MIPS_LO16 .rodata
1bc: 8f820000 lw v0,0(gp)
1bc: R_MIPS_CALL16 __nrv_alloc_D2A
1c0: 00000000 nop
1c4: 0040c825 move t9,v0
1c8: 0320f809 jalr t9
1c8: R_MIPS_JALR __nrv_alloc_D2A
1cc: 00000000 nop
1d0: 8fdc0010 lw gp,16(s8)
1d4: 100009cc b 2908 <__dtoa+0x2908>
1d8: 00000000 nop
1dc: 8fc2007c lw v0,124(s8)
1e0: 00000000 nop
1e4: 28420002 slti v0,v0,2
1e8: 14400017 bnez v0,248 <__dtoa+0x248>
1ec: 00000000 nop
1f0: 8fc200e4 lw v0,228(s8)
1f4: 00000000 nop
1f8: 8c420000 lw v0,0(v0)
1fc: 00000000 nop
200: 1040000c beqz v0,234 <__dtoa+0x234>
204: 00000000 nop
208: 8fc3007c lw v1,124(s8)
20c: 24020002 li v0,2
210: 14620004 bne v1,v0,224 <__dtoa+0x224>
214: 00000000 nop
218: 00001025 move v0,zero
21c: 10000002 b 228 <__dtoa+0x228>
220: 00000000 nop
224: 24020002 li v0,2
228: afc2007c sw v0,124(s8)
22c: 10000006 b 248 <__dtoa+0x248>
230: 00000000 nop
234: 8fc3007c lw v1,124(s8)
238: 24020002 li v0,2
23c: 10620002 beq v1,v0,248 <__dtoa+0x248>
240: 00000000 nop
244: afc0007c sw zero,124(s8)
248: c7c000ac lwc1 $f0,172(s8)
24c: 00000000 nop
250: c7c100a8 lwc1 $f1,168(s8)
254: 27c300a0 addiu v1,s8,160
258: 27c200a4 addiu v0,s8,164
25c: 00603825 move a3,v1
260: 00403025 move a2,v0
264: 46200306 mov.d $f12,$f0
268: 8f820000 lw v0,0(gp)
268: R_MIPS_CALL16 __d2b_D2A
26c: 00000000 nop
270: 0040c825 move t9,v0
274: 0320f809 jalr t9
274: R_MIPS_JALR __d2b_D2A
278: 00000000 nop
27c: 8fdc0010 lw gp,16(s8)
280: afc20060 sw v0,96(s8)
284: 8fc20060 lw v0,96(s8)
288: 00000000 nop
28c: 14400004 bnez v0,2a0 <__dtoa+0x2a0>
290: 00000000 nop
294: 00001025 move v0,zero
298: 1000099b b 2908 <__dtoa+0x2908>
29c: 00000000 nop
2a0: 8fc200a8 lw v0,168(s8)
2a4: 00000000 nop
2a8: 00021502 srl v0,v0,0x14
2ac: 304207ff andi v0,v0,0x7ff
2b0: afc20024 sw v0,36(s8)
2b4: 8fc20024 lw v0,36(s8)
2b8: 00000000 nop
2bc: 10400017 beqz v0,31c <__dtoa+0x31c>
2c0: 00000000 nop
2c4: c7c000ac lwc1 $f0,172(s8)
2c8: 00000000 nop
2cc: c7c100a8 lwc1 $f1,168(s8)
2d0: 00000000 nop
2d4: e7c000b4 swc1 $f0,180(s8)
2d8: e7c100b0 swc1 $f1,176(s8)
2dc: 8fc300b0 lw v1,176(s8)
2e0: 3c02000f lui v0,0xf
2e4: 3442ffff ori v0,v0,0xffff
2e8: 00621024 and v0,v1,v0
2ec: afc200b0 sw v0,176(s8)
2f0: 8fc300b0 lw v1,176(s8)
2f4: 3c023ff0 lui v0,0x3ff0
2f8: 00621025 or v0,v1,v0
2fc: afc200b0 sw v0,176(s8)
300: 8fc20024 lw v0,36(s8)
304: 00000000 nop
308: 2442fc01 addiu v0,v0,-1023
30c: afc20024 sw v0,36(s8)
310: afc0005c sw zero,92(s8)
314: 1000003d b 40c <__dtoa+0x40c>
318: 00000000 nop
31c: 8fc300a0 lw v1,160(s8)
320: 8fc200a4 lw v0,164(s8)
324: 00000000 nop
328: 00621021 addu v0,v1,v0
32c: 24420432 addiu v0,v0,1074
330: afc20024 sw v0,36(s8)
334: 8fc20024 lw v0,36(s8)
338: 00000000 nop
33c: 28420021 slti v0,v0,33
340: 1440000f bnez v0,380 <__dtoa+0x380>
344: 00000000 nop
348: 8fc300a8 lw v1,168(s8)
34c: 24040040 li a0,64
350: 8fc20024 lw v0,36(s8)
354: 00000000 nop
358: 00821023 subu v0,a0,v0
35c: 00431804 sllv v1,v1,v0
360: 8fc400ac lw a0,172(s8)
364: 8fc20024 lw v0,36(s8)
368: 00000000 nop
36c: 2442ffe0 addiu v0,v0,-32
370: 00441006 srlv v0,a0,v0
374: 00621025 or v0,v1,v0
378: 10000007 b 398 <__dtoa+0x398>
37c: 00000000 nop
380: 8fc300ac lw v1,172(s8)
384: 24040020 li a0,32
388: 8fc20024 lw v0,36(s8)
38c: 00000000 nop
390: 00821023 subu v0,a0,v0
394: 00431004 sllv v0,v1,v0
398: afc20080 sw v0,128(s8)
39c: 8fc20080 lw v0,128(s8)
3a0: 00000000 nop
3a4: 44820000 mtc1 v0,$f0
3a8: 00000000 nop
3ac: 46800021 cvt.d.w $f0,$f0
3b0: 8fc20080 lw v0,128(s8)
3b4: 00000000 nop
3b8: 04410008 bgez v0,3dc <__dtoa+0x3dc>
3bc: 00000000 nop
3c0: 8f820000 lw v0,0(gp)
3c0: R_MIPS_GOT16 .rodata
3c4: 00000000 nop
3c8: c4420034 lwc1 $f2,52(v0)
3c8: R_MIPS_LO16 .rodata
3cc: 00000000 nop
3d0: c4430030 lwc1 $f3,48(v0)
3d0: R_MIPS_LO16 .rodata
3d4: 00000000 nop
3d8: 46220000 add.d $f0,$f0,$f2
3dc: e7c000b4 swc1 $f0,180(s8)
3e0: e7c100b0 swc1 $f1,176(s8)
3e4: 8fc300b0 lw v1,176(s8)
3e8: 3c02fe10 lui v0,0xfe10
3ec: 00621021 addu v0,v1,v0
3f0: afc200b0 sw v0,176(s8)
3f4: 8fc20024 lw v0,36(s8)
3f8: 00000000 nop
3fc: 2442fbcd addiu v0,v0,-1075
400: afc20024 sw v0,36(s8)
404: 24020001 li v0,1
408: afc2005c sw v0,92(s8)
40c: c7c200b4 lwc1 $f2,180(s8)
410: 00000000 nop
414: c7c300b0 lwc1 $f3,176(s8)
418: 8f820000 lw v0,0(gp)
418: R_MIPS_GOT16 .rodata
41c: 00000000 nop
420: c440003c lwc1 $f0,60(v0)
420: R_MIPS_LO16 .rodata
424: 00000000 nop
428: c4410038 lwc1 $f1,56(v0)
428: R_MIPS_LO16 .rodata
42c: 00000000 nop
430: 46201081 sub.d $f2,$f2,$f0
434: 8f820000 lw v0,0(gp)
434: R_MIPS_GOT16 .rodata
438: 00000000 nop
43c: c4400044 lwc1 $f0,68(v0)
43c: R_MIPS_LO16 .rodata
440: 00000000 nop
444: c4410040 lwc1 $f1,64(v0)
444: R_MIPS_LO16 .rodata
448: 00000000 nop
44c: 46201082 mul.d $f2,$f2,$f0
450: 8f820000 lw v0,0(gp)
450: R_MIPS_GOT16 .rodata
454: 00000000 nop
458: c440004c lwc1 $f0,76(v0)
458: R_MIPS_LO16 .rodata
45c: 00000000 nop
460: c4410048 lwc1 $f1,72(v0)
460: R_MIPS_LO16 .rodata
464: 00000000 nop
468: 46201080 add.d $f2,$f2,$f0
46c: 8fc20024 lw v0,36(s8)
470: 00000000 nop
474: 44820000 mtc1 v0,$f0
478: 00000000 nop
47c: 46800121 cvt.d.w $f4,$f0
480: 8f820000 lw v0,0(gp)
480: R_MIPS_GOT16 .rodata
484: 00000000 nop
488: c4400054 lwc1 $f0,84(v0)
488: R_MIPS_LO16 .rodata
48c: 00000000 nop
490: c4410050 lwc1 $f1,80(v0)
490: R_MIPS_LO16 .rodata
494: 00000000 nop
498: 46202002 mul.d $f0,$f4,$f0
49c: 46201000 add.d $f0,$f2,$f0
4a0: e7c00074 swc1 $f0,116(s8)
4a4: e7c10070 swc1 $f1,112(s8)
4a8: c7c00074 lwc1 $f0,116(s8)
4ac: 00000000 nop
4b0: c7c10070 lwc1 $f1,112(s8)
4b4: 00000000 nop
4b8: 4442f800 cfc1 v0,$31
4bc: 4442f800 cfc1 v0,$31
4c0: 00000000 nop
4c4: 34410003 ori at,v0,0x3
4c8: 38210002 xori at,at,0x2
4cc: 44c1f800 ctc1 at,$31
4d0: 00000000 nop
4d4: 46200024 cvt.w.d $f0,$f0
4d8: 44c2f800 ctc1 v0,$31
4dc: 00000000 nop
4e0: 44020000 mfc1 v0,$f0
4e4: 00000000 nop
4e8: afc20030 sw v0,48(s8)
4ec: c7c00074 lwc1 $f0,116(s8)
4f0: 00000000 nop
4f4: c7c10070 lwc1 $f1,112(s8)
4f8: 44801000 mtc1 zero,$f2
4fc: 00000000 nop
500: 44801800 mtc1 zero,$f3
504: 00000000 nop
508: 4622003c c.lt.d $f0,$f2
50c: 00000000 nop
510: 45000012 bc1f 55c <__dtoa+0x55c>
514: 00000000 nop
518: 8fc20030 lw v0,48(s8)
51c: 00000000 nop
520: 44820000 mtc1 v0,$f0
524: 00000000 nop
528: 46800021 cvt.d.w $f0,$f0
52c: c7c20074 lwc1 $f2,116(s8)
530: 00000000 nop
534: c7c30070 lwc1 $f3,112(s8)
538: 00000000 nop
53c: 46201032 c.eq.d $f2,$f0
540: 00000000 nop
544: 45010005 bc1t 55c <__dtoa+0x55c>
548: 00000000 nop
54c: 8fc20030 lw v0,48(s8)
550: 00000000 nop
554: 2442ffff addiu v0,v0,-1
558: afc20030 sw v0,48(s8)
55c: 24020001 li v0,1
560: afc20034 sw v0,52(s8)
564: 8fc20030 lw v0,48(s8)
568: 00000000 nop
56c: 0440001b bltz v0,5dc <__dtoa+0x5dc>
570: 00000000 nop
574: 8fc20030 lw v0,48(s8)
578: 00000000 nop
57c: 28420017 slti v0,v0,23
580: 10400016 beqz v0,5dc <__dtoa+0x5dc>
584: 00000000 nop
588: c7c200ac lwc1 $f2,172(s8)
58c: 00000000 nop
590: c7c300a8 lwc1 $f3,168(s8)
594: 8f830000 lw v1,0(gp)
594: R_MIPS_GOT16 __tens_D2A
598: 8fc20030 lw v0,48(s8)
59c: 00000000 nop
5a0: 000210c0 sll v0,v0,0x3
5a4: 00621021 addu v0,v1,v0
5a8: c4400004 lwc1 $f0,4(v0)
5ac: 00000000 nop
5b0: c4410000 lwc1 $f1,0(v0)
5b4: 00000000 nop
5b8: 4620103c c.lt.d $f2,$f0
5bc: 00000000 nop
5c0: 45000005 bc1f 5d8 <__dtoa+0x5d8>
5c4: 00000000 nop
5c8: 8fc20030 lw v0,48(s8)
5cc: 00000000 nop
5d0: 2442ffff addiu v0,v0,-1
5d4: afc20030 sw v0,48(s8)
5d8: afc00034 sw zero,52(s8)
5dc: 8fc300a0 lw v1,160(s8)
5e0: 8fc20024 lw v0,36(s8)
5e4: 00000000 nop
5e8: 00621023 subu v0,v1,v0
5ec: 2442ffff addiu v0,v0,-1
5f0: afc2002c sw v0,44(s8)
5f4: 8fc2002c lw v0,44(s8)
5f8: 00000000 nop
5fc: 04400007 bltz v0,61c <__dtoa+0x61c>
600: 00000000 nop
604: afc00018 sw zero,24(s8)
608: 8fc2002c lw v0,44(s8)
60c: 00000000 nop
610: afc20040 sw v0,64(s8)
614: 10000006 b 630 <__dtoa+0x630>
618: 00000000 nop
61c: 8fc2002c lw v0,44(s8)
620: 00000000 nop
624: 00021023 negu v0,v0
628: afc20018 sw v0,24(s8)
62c: afc00040 sw zero,64(s8)
630: 8fc20030 lw v0,48(s8)
634: 00000000 nop
638: 0440000c bltz v0,66c <__dtoa+0x66c>
63c: 00000000 nop
640: afc0001c sw zero,28(s8)
644: 8fc20030 lw v0,48(s8)
648: 00000000 nop
64c: afc20044 sw v0,68(s8)
650: 8fc30040 lw v1,64(s8)
654: 8fc20030 lw v0,48(s8)
658: 00000000 nop
65c: 00621021 addu v0,v1,v0
660: afc20040 sw v0,64(s8)
664: 1000000b b 694 <__dtoa+0x694>
668: 00000000 nop
66c: 8fc30018 lw v1,24(s8)
670: 8fc20030 lw v0,48(s8)
674: 00000000 nop
678: 00621023 subu v0,v1,v0
67c: afc20018 sw v0,24(s8)
680: 8fc20030 lw v0,48(s8)
684: 00000000 nop
688: 00021023 negu v0,v0
68c: afc2001c sw v0,28(s8)
690: afc00044 sw zero,68(s8)
694: 8fc200d8 lw v0,216(s8)
698: 00000000 nop
69c: 04400006 bltz v0,6b8 <__dtoa+0x6b8>
6a0: 00000000 nop
6a4: 8fc200d8 lw v0,216(s8)
6a8: 00000000 nop
6ac: 2842000a slti v0,v0,10
6b0: 14400002 bnez v0,6bc <__dtoa+0x6bc>
6b4: 00000000 nop
6b8: afc000d8 sw zero,216(s8)
6bc: 8fc2007c lw v0,124(s8)
6c0: 00000000 nop
6c4: 38420001 xori v0,v0,0x1
6c8: 2c420001 sltiu v0,v0,1
6cc: 304200ff andi v0,v0,0xff
6d0: afc2004c sw v0,76(s8)
6d4: 8fc200d8 lw v0,216(s8)
6d8: 00000000 nop
6dc: 28420006 slti v0,v0,6
6e0: 14400006 bnez v0,6fc <__dtoa+0x6fc>
6e4: 00000000 nop
6e8: 8fc200d8 lw v0,216(s8)
6ec: 00000000 nop
6f0: 2442fffc addiu v0,v0,-4
6f4: afc200d8 sw v0,216(s8)
6f8: afc0004c sw zero,76(s8)
6fc: 24020001 li v0,1
700: afc20038 sw v0,56(s8)
704: 2402ffff li v0,-1
708: afc20054 sw v0,84(s8)
70c: 8fc20054 lw v0,84(s8)
710: 00000000 nop
714: afc20050 sw v0,80(s8)
718: 8fc200d8 lw v0,216(s8)
71c: 00000000 nop
720: 2c420006 sltiu v0,v0,6
724: 10400038 beqz v0,808 <__dtoa+0x808>
728: 00000000 nop
72c: 8fc200d8 lw v0,216(s8)
730: 00000000 nop
734: 00021880 sll v1,v0,0x2
738: 8f820000 lw v0,0(gp)
738: R_MIPS_GOT16 .rodata
73c: 00000000 nop
740: 24420014 addiu v0,v0,20
740: R_MIPS_LO16 .rodata
744: 00621021 addu v0,v1,v0
748: 8c420000 lw v0,0(v0)
74c: 00000000 nop
750: 005c1021 addu v0,v0,gp
754: 00400008 jr v0
758: 00000000 nop
75c: 24020012 li v0,18
760: afc20024 sw v0,36(s8)
764: afc000dc sw zero,220(s8)
768: 10000027 b 808 <__dtoa+0x808>
76c: 00000000 nop
770: afc00038 sw zero,56(s8)
774: 8fc200dc lw v0,220(s8)
778: 00000000 nop
77c: 1c400003 bgtz v0,78c <__dtoa+0x78c>
780: 00000000 nop
784: 24020001 li v0,1
788: afc200dc sw v0,220(s8)
78c: 8fc200dc lw v0,220(s8)
790: 00000000 nop
794: afc20024 sw v0,36(s8)
798: 8fc20024 lw v0,36(s8)
79c: 00000000 nop
7a0: afc20054 sw v0,84(s8)
7a4: 8fc20054 lw v0,84(s8)
7a8: 00000000 nop
7ac: afc20050 sw v0,80(s8)
7b0: 10000015 b 808 <__dtoa+0x808>
7b4: 00000000 nop
7b8: afc00038 sw zero,56(s8)
7bc: 8fc300dc lw v1,220(s8)
7c0: 8fc20030 lw v0,48(s8)
7c4: 00000000 nop
7c8: 00621021 addu v0,v1,v0
7cc: 24420001 addiu v0,v0,1
7d0: afc20024 sw v0,36(s8)
7d4: 8fc20024 lw v0,36(s8)
7d8: 00000000 nop
7dc: afc20050 sw v0,80(s8)
7e0: 8fc20024 lw v0,36(s8)
7e4: 00000000 nop
7e8: 2442ffff addiu v0,v0,-1
7ec: afc20054 sw v0,84(s8)
7f0: 8fc20024 lw v0,36(s8)
7f4: 00000000 nop
7f8: 1c400003 bgtz v0,808 <__dtoa+0x808>
7fc: 00000000 nop
800: 24020001 li v0,1
804: afc20024 sw v0,36(s8)
808: 8fc20024 lw v0,36(s8)
80c: 00000000 nop
810: 00402025 move a0,v0
814: 8f820000 lw v0,0(gp)
814: R_MIPS_CALL16 __rv_alloc_D2A
818: 00000000 nop
81c: 0040c825 move t9,v0
820: 0320f809 jalr t9
820: R_MIPS_JALR __rv_alloc_D2A
824: 00000000 nop
828: 8fdc0010 lw gp,16(s8)
82c: afc20084 sw v0,132(s8)
830: 8fc20084 lw v0,132(s8)
834: 00000000 nop
838: afc20078 sw v0,120(s8)
83c: 8fc20078 lw v0,120(s8)
840: 00000000 nop
844: 14400004 bnez v0,858 <__dtoa+0x858>
848: 00000000 nop
84c: 00001025 move v0,zero
850: 1000082d b 2908 <__dtoa+0x2908>
854: 00000000 nop
858: 8fc200d8 lw v0,216(s8)
85c: 00000000 nop
860: 28420002 slti v0,v0,2
864: 14400006 bnez v0,880 <__dtoa+0x880>
868: 00000000 nop
86c: 8fc3007c lw v1,124(s8)
870: 24020001 li v0,1
874: 10620002 beq v1,v0,880 <__dtoa+0x880>
878: 00000000 nop
87c: afc00038 sw zero,56(s8)
880: 8fc20050 lw v0,80(s8)
884: 00000000 nop
888: 0440025d bltz v0,1200 <__dtoa+0x1200>
88c: 00000000 nop
890: 8fc20050 lw v0,80(s8)
894: 00000000 nop
898: 2842000f slti v0,v0,15
89c: 10400258 beqz v0,1200 <__dtoa+0x1200>
8a0: 00000000 nop
8a4: 8fc2004c lw v0,76(s8)
8a8: 00000000 nop
8ac: 10400254 beqz v0,1200 <__dtoa+0x1200>
8b0: 00000000 nop
8b4: afc00024 sw zero,36(s8)
8b8: c7c000ac lwc1 $f0,172(s8)
8bc: 00000000 nop
8c0: c7c100a8 lwc1 $f1,168(s8)
8c4: 00000000 nop
8c8: e7c000b4 swc1 $f0,180(s8)
8cc: e7c100b0 swc1 $f1,176(s8)
8d0: 8fc20030 lw v0,48(s8)
8d4: 00000000 nop
8d8: afc20088 sw v0,136(s8)
8dc: 8fc20050 lw v0,80(s8)
8e0: 00000000 nop
8e4: afc2008c sw v0,140(s8)
8e8: 24020002 li v0,2
8ec: afc20028 sw v0,40(s8)
8f0: 8fc20030 lw v0,48(s8)
8f4: 00000000 nop
8f8: 1840005c blez v0,a6c <__dtoa+0xa6c>
8fc: 00000000 nop
900: 8fc20030 lw v0,48(s8)
904: 00000000 nop
908: 3042000f andi v0,v0,0xf
90c: 8f830000 lw v1,0(gp)
90c: R_MIPS_GOT16 __tens_D2A
910: 000210c0 sll v0,v0,0x3
914: 00621021 addu v0,v1,v0
918: c4400004 lwc1 $f0,4(v0)
91c: 00000000 nop
920: c4410000 lwc1 $f1,0(v0)
924: 00000000 nop
928: e7c00074 swc1 $f0,116(s8)
92c: e7c10070 swc1 $f1,112(s8)
930: 8fc20030 lw v0,48(s8)
934: 00000000 nop
938: 00021102 srl v0,v0,0x4
93c: afc2002c sw v0,44(s8)
940: 8fc2002c lw v0,44(s8)
944: 00000000 nop
948: 30420010 andi v0,v0,0x10
94c: 10400037 beqz v0,a2c <__dtoa+0xa2c>
950: 00000000 nop
954: 8fc2002c lw v0,44(s8)
958: 00000000 nop
95c: 3042000f andi v0,v0,0xf
960: afc2002c sw v0,44(s8)
964: c7c200ac lwc1 $f2,172(s8)
968: 00000000 nop
96c: c7c300a8 lwc1 $f3,168(s8)
970: 8f820000 lw v0,0(gp)
970: R_MIPS_GOT16 __bigtens_D2A
974: 00000000 nop
978: c4400024 lwc1 $f0,36(v0)
97c: 00000000 nop
980: c4410020 lwc1 $f1,32(v0)
984: 00000000 nop
988: 46201003 div.d $f0,$f2,$f0
98c: e7c000ac swc1 $f0,172(s8)
990: e7c100a8 swc1 $f1,168(s8)
994: 8fc20028 lw v0,40(s8)
998: 00000000 nop
99c: 24420001 addiu v0,v0,1
9a0: afc20028 sw v0,40(s8)
9a4: 10000021 b a2c <__dtoa+0xa2c>
9a8: 00000000 nop
9ac: 8fc2002c lw v0,44(s8)
9b0: 00000000 nop
9b4: 30420001 andi v0,v0,0x1
9b8: 10400014 beqz v0,a0c <__dtoa+0xa0c>
9bc: 00000000 nop
9c0: 8fc20028 lw v0,40(s8)
9c4: 00000000 nop
9c8: 24420001 addiu v0,v0,1
9cc: afc20028 sw v0,40(s8)
9d0: 8f830000 lw v1,0(gp)
9d0: R_MIPS_GOT16 __bigtens_D2A
9d4: 8fc20024 lw v0,36(s8)
9d8: 00000000 nop
9dc: 000210c0 sll v0,v0,0x3
9e0: 00621021 addu v0,v1,v0
9e4: c4400004 lwc1 $f0,4(v0)
9e8: 00000000 nop
9ec: c4410000 lwc1 $f1,0(v0)
9f0: c7c20074 lwc1 $f2,116(s8)
9f4: 00000000 nop
9f8: c7c30070 lwc1 $f3,112(s8)
9fc: 00000000 nop
a00: 46201002 mul.d $f0,$f2,$f0
a04: e7c00074 swc1 $f0,116(s8)
a08: e7c10070 swc1 $f1,112(s8)
a0c: 8fc2002c lw v0,44(s8)
a10: 00000000 nop
a14: 00021042 srl v0,v0,0x1
a18: afc2002c sw v0,44(s8)
a1c: 8fc20024 lw v0,36(s8)
a20: 00000000 nop
a24: 24420001 addiu v0,v0,1
a28: afc20024 sw v0,36(s8)
a2c: 8fc2002c lw v0,44(s8)
a30: 00000000 nop
a34: 1440ffdd bnez v0,9ac <__dtoa+0x9ac>
a38: 00000000 nop
a3c: c7c200ac lwc1 $f2,172(s8)
a40: 00000000 nop
a44: c7c300a8 lwc1 $f3,168(s8)
a48: c7c00074 lwc1 $f0,116(s8)
a4c: 00000000 nop
a50: c7c10070 lwc1 $f1,112(s8)
a54: 00000000 nop
a58: 46201003 div.d $f0,$f2,$f0
a5c: e7c000ac swc1 $f0,172(s8)
a60: e7c100a8 swc1 $f1,168(s8)
a64: 10000043 b b74 <__dtoa+0xb74>
a68: 00000000 nop
a6c: 8fc20030 lw v0,48(s8)
a70: 00000000 nop
a74: 00021023 negu v0,v0
a78: afc20090 sw v0,144(s8)
a7c: 8fc20090 lw v0,144(s8)
a80: 00000000 nop
a84: 1040003b beqz v0,b74 <__dtoa+0xb74>
a88: 00000000 nop
a8c: c7c200ac lwc1 $f2,172(s8)
a90: 00000000 nop
a94: c7c300a8 lwc1 $f3,168(s8)
a98: 8fc20090 lw v0,144(s8)
a9c: 00000000 nop
aa0: 3042000f andi v0,v0,0xf
aa4: 8f830000 lw v1,0(gp)
aa4: R_MIPS_GOT16 __tens_D2A
aa8: 000210c0 sll v0,v0,0x3
aac: 00621021 addu v0,v1,v0
ab0: c4400004 lwc1 $f0,4(v0)
ab4: 00000000 nop
ab8: c4410000 lwc1 $f1,0(v0)
abc: 00000000 nop
ac0: 46201002 mul.d $f0,$f2,$f0
ac4: e7c000ac swc1 $f0,172(s8)
ac8: e7c100a8 swc1 $f1,168(s8)
acc: 8fc20090 lw v0,144(s8)
ad0: 00000000 nop
ad4: 00021103 sra v0,v0,0x4
ad8: afc2002c sw v0,44(s8)
adc: 10000021 b b64 <__dtoa+0xb64>
ae0: 00000000 nop
ae4: 8fc2002c lw v0,44(s8)
ae8: 00000000 nop
aec: 30420001 andi v0,v0,0x1
af0: 10400014 beqz v0,b44 <__dtoa+0xb44>
af4: 00000000 nop
af8: 8fc20028 lw v0,40(s8)
afc: 00000000 nop
b00: 24420001 addiu v0,v0,1
b04: afc20028 sw v0,40(s8)
b08: c7c200ac lwc1 $f2,172(s8)
b0c: 00000000 nop
b10: c7c300a8 lwc1 $f3,168(s8)
b14: 8f830000 lw v1,0(gp)
b14: R_MIPS_GOT16 __bigtens_D2A
b18: 8fc20024 lw v0,36(s8)
b1c: 00000000 nop
b20: 000210c0 sll v0,v0,0x3
b24: 00621021 addu v0,v1,v0
b28: c4400004 lwc1 $f0,4(v0)
b2c: 00000000 nop
b30: c4410000 lwc1 $f1,0(v0)
b34: 00000000 nop
b38: 46201002 mul.d $f0,$f2,$f0
b3c: e7c000ac swc1 $f0,172(s8)
b40: e7c100a8 swc1 $f1,168(s8)
b44: 8fc2002c lw v0,44(s8)
b48: 00000000 nop
b4c: 00021043 sra v0,v0,0x1
b50: afc2002c sw v0,44(s8)
b54: 8fc20024 lw v0,36(s8)
b58: 00000000 nop
b5c: 24420001 addiu v0,v0,1
b60: afc20024 sw v0,36(s8)
b64: 8fc2002c lw v0,44(s8)
b68: 00000000 nop
b6c: 1440ffdd bnez v0,ae4 <__dtoa+0xae4>
b70: 00000000 nop
b74: 8fc20034 lw v0,52(s8)
b78: 00000000 nop
b7c: 1040002d beqz v0,c34 <__dtoa+0xc34>
b80: 00000000 nop
b84: c7c200ac lwc1 $f2,172(s8)
b88: 00000000 nop
b8c: c7c300a8 lwc1 $f3,168(s8)
b90: 8f820000 lw v0,0(gp)
b90: R_MIPS_GOT16 .rodata
b94: 00000000 nop
b98: c440005c lwc1 $f0,92(v0)
b98: R_MIPS_LO16 .rodata
b9c: 00000000 nop
ba0: c4410058 lwc1 $f1,88(v0)
ba0: R_MIPS_LO16 .rodata
ba4: 00000000 nop
ba8: 4620103c c.lt.d $f2,$f0
bac: 00000000 nop
bb0: 45000020 bc1f c34 <__dtoa+0xc34>
bb4: 00000000 nop
bb8: 8fc20050 lw v0,80(s8)
bbc: 00000000 nop
bc0: 1840001c blez v0,c34 <__dtoa+0xc34>
bc4: 00000000 nop
bc8: 8fc20054 lw v0,84(s8)
bcc: 00000000 nop
bd0: 18400178 blez v0,11b4 <__dtoa+0x11b4>
bd4: 00000000 nop
bd8: 8fc20054 lw v0,84(s8)
bdc: 00000000 nop
be0: afc20050 sw v0,80(s8)
be4: 8fc20030 lw v0,48(s8)
be8: 00000000 nop
bec: 2442ffff addiu v0,v0,-1
bf0: afc20030 sw v0,48(s8)
bf4: c7c200ac lwc1 $f2,172(s8)
bf8: 00000000 nop
bfc: c7c300a8 lwc1 $f3,168(s8)
c00: 8f820000 lw v0,0(gp)
c00: R_MIPS_GOT16 .rodata
c04: 00000000 nop
c08: c4400064 lwc1 $f0,100(v0)
c08: R_MIPS_LO16 .rodata
c0c: 00000000 nop
c10: c4410060 lwc1 $f1,96(v0)
c10: R_MIPS_LO16 .rodata
c14: 00000000 nop
c18: 46201002 mul.d $f0,$f2,$f0
c1c: e7c000ac swc1 $f0,172(s8)
c20: e7c100a8 swc1 $f1,168(s8)
c24: 8fc20028 lw v0,40(s8)
c28: 00000000 nop
c2c: 24420001 addiu v0,v0,1
c30: afc20028 sw v0,40(s8)
c34: 8fc20028 lw v0,40(s8)
c38: 00000000 nop
c3c: 44820000 mtc1 v0,$f0
c40: 00000000 nop
c44: 468000a1 cvt.d.w $f2,$f0
c48: c7c000ac lwc1 $f0,172(s8)
c4c: 00000000 nop
c50: c7c100a8 lwc1 $f1,168(s8)
c54: 00000000 nop
c58: 46201082 mul.d $f2,$f2,$f0
c5c: 8f820000 lw v0,0(gp)
c5c: R_MIPS_GOT16 .rodata
c60: 00000000 nop
c64: c440006c lwc1 $f0,108(v0)
c64: R_MIPS_LO16 .rodata
c68: 00000000 nop
c6c: c4410068 lwc1 $f1,104(v0)
c6c: R_MIPS_LO16 .rodata
c70: 00000000 nop
c74: 46201000 add.d $f0,$f2,$f0
c78: e7c000bc swc1 $f0,188(s8)
c7c: e7c100b8 swc1 $f1,184(s8)
c80: 8fc300b8 lw v1,184(s8)
c84: 3c02fcc0 lui v0,0xfcc0
c88: 00621021 addu v0,v1,v0
c8c: afc200b8 sw v0,184(s8)
c90: 8fc20050 lw v0,80(s8)
c94: 00000000 nop
c98: 1440002e bnez v0,d54 <__dtoa+0xd54>
c9c: 00000000 nop
ca0: afc00064 sw zero,100(s8)
ca4: 8fc20064 lw v0,100(s8)
ca8: 00000000 nop
cac: afc20068 sw v0,104(s8)
cb0: c7c200ac lwc1 $f2,172(s8)
cb4: 00000000 nop
cb8: c7c300a8 lwc1 $f3,168(s8)
cbc: 8f820000 lw v0,0(gp)
cbc: R_MIPS_GOT16 .rodata
cc0: 00000000 nop
cc4: c4400074 lwc1 $f0,116(v0)
cc4: R_MIPS_LO16 .rodata
cc8: 00000000 nop
ccc: c4410070 lwc1 $f1,112(v0)
ccc: R_MIPS_LO16 .rodata
cd0: 00000000 nop
cd4: 46201001 sub.d $f0,$f2,$f0
cd8: e7c000ac swc1 $f0,172(s8)
cdc: e7c100a8 swc1 $f1,168(s8)
ce0: c7c200ac lwc1 $f2,172(s8)
ce4: 00000000 nop
ce8: c7c300a8 lwc1 $f3,168(s8)
cec: c7c000bc lwc1 $f0,188(s8)
cf0: 00000000 nop
cf4: c7c100b8 lwc1 $f1,184(s8)
cf8: 00000000 nop
cfc: 4622003c c.lt.d $f0,$f2
d00: 00000000 nop
d04: 45010436 bc1t 1de0 <__dtoa+0x1de0>
d08: 00000000 nop
d0c: c7c000ac lwc1 $f0,172(s8)
d10: 00000000 nop
d14: c7c100a8 lwc1 $f1,168(s8)
d18: 8fc300bc lw v1,188(s8)
d1c: 8fc200b8 lw v0,184(s8)
d20: 3c048000 lui a0,0x8000
d24: 00448026 xor s0,v0,a0
d28: 00608825 move s1,v1
d2c: 44911000 mtc1 s1,$f2
d30: 00000000 nop
d34: 44901800 mtc1 s0,$f3
d38: 00000000 nop
d3c: 4622003c c.lt.d $f0,$f2
d40: 00000000 nop
d44: 4501041c bc1t 1db8 <__dtoa+0x1db8>
d48: 00000000 nop
d4c: 1000011d b 11c4 <__dtoa+0x11c4>
d50: 00000000 nop
d54: 8fc20038 lw v0,56(s8)
d58: 00000000 nop
d5c: 10400082 beqz v0,f68 <__dtoa+0xf68>
d60: 00000000 nop
d64: 8fc20050 lw v0,80(s8)
d68: 00000000 nop
d6c: 2442ffff addiu v0,v0,-1
d70: 8f830000 lw v1,0(gp)
d70: R_MIPS_GOT16 __tens_D2A
d74: 000210c0 sll v0,v0,0x3
d78: 00621021 addu v0,v1,v0
d7c: c4400004 lwc1 $f0,4(v0)
d80: 00000000 nop
d84: c4410000 lwc1 $f1,0(v0)
d88: 8f820000 lw v0,0(gp)
d88: R_MIPS_GOT16 .rodata
d8c: 00000000 nop
d90: c442007c lwc1 $f2,124(v0)
d90: R_MIPS_LO16 .rodata
d94: 00000000 nop
d98: c4430078 lwc1 $f3,120(v0)
d98: R_MIPS_LO16 .rodata
d9c: 00000000 nop
da0: 46201083 div.d $f2,$f2,$f0
da4: c7c000bc lwc1 $f0,188(s8)
da8: 00000000 nop
dac: c7c100b8 lwc1 $f1,184(s8)
db0: 00000000 nop
db4: 46201001 sub.d $f0,$f2,$f0
db8: e7c000bc swc1 $f0,188(s8)
dbc: e7c100b8 swc1 $f1,184(s8)
dc0: afc00024 sw zero,36(s8)
dc4: c7c000ac lwc1 $f0,172(s8)
dc8: 00000000 nop
dcc: c7c100a8 lwc1 $f1,168(s8)
dd0: 00000000 nop
dd4: 4442f800 cfc1 v0,$31
dd8: 4442f800 cfc1 v0,$31
ddc: 00000000 nop
de0: 34410003 ori at,v0,0x3
de4: 38210002 xori at,at,0x2
de8: 44c1f800 ctc1 at,$31
dec: 00000000 nop
df0: 46200024 cvt.w.d $f0,$f0
df4: 44c2f800 ctc1 v0,$31
df8: 00000000 nop
dfc: 44020000 mfc1 v0,$f0
e00: 00000000 nop
e04: afc20058 sw v0,88(s8)
e08: c7c200ac lwc1 $f2,172(s8)
e0c: 00000000 nop
e10: c7c300a8 lwc1 $f3,168(s8)
e14: 8fc20058 lw v0,88(s8)
e18: 00000000 nop
e1c: 44820000 mtc1 v0,$f0
e20: 00000000 nop
e24: 46800021 cvt.d.w $f0,$f0
e28: 46201001 sub.d $f0,$f2,$f0
e2c: e7c000ac swc1 $f0,172(s8)
e30: e7c100a8 swc1 $f1,168(s8)
e34: 8fc20058 lw v0,88(s8)
e38: 00000000 nop
e3c: 304200ff andi v0,v0,0xff
e40: 24420030 addiu v0,v0,48
e44: 304400ff andi a0,v0,0xff
e48: 8fc20078 lw v0,120(s8)
e4c: 00000000 nop
e50: 24430001 addiu v1,v0,1
e54: afc30078 sw v1,120(s8)
e58: 00041e00 sll v1,a0,0x18
e5c: 00031e03 sra v1,v1,0x18
e60: a0430000 sb v1,0(v0)
e64: c7c200ac lwc1 $f2,172(s8)
e68: 00000000 nop
e6c: c7c300a8 lwc1 $f3,168(s8)
e70: c7c000bc lwc1 $f0,188(s8)
e74: 00000000 nop
e78: c7c100b8 lwc1 $f1,184(s8)
e7c: 00000000 nop
e80: 4620103c c.lt.d $f2,$f0
e84: 00000000 nop
e88: 45010673 bc1t 2858 <__dtoa+0x2858>
e8c: 00000000 nop
e90: c7c000ac lwc1 $f0,172(s8)
e94: 00000000 nop
e98: c7c100a8 lwc1 $f1,168(s8)
e9c: 8f820000 lw v0,0(gp)
e9c: R_MIPS_GOT16 .rodata
ea0: 00000000 nop
ea4: c442005c lwc1 $f2,92(v0)
ea4: R_MIPS_LO16 .rodata
ea8: 00000000 nop
eac: c4430058 lwc1 $f3,88(v0)
eac: R_MIPS_LO16 .rodata
eb0: 00000000 nop
eb4: 46201081 sub.d $f2,$f2,$f0
eb8: c7c000bc lwc1 $f0,188(s8)
ebc: 00000000 nop
ec0: c7c100b8 lwc1 $f1,184(s8)
ec4: 00000000 nop
ec8: 4620103c c.lt.d $f2,$f0
ecc: 00000000 nop
ed0: 4501018e bc1t 150c <__dtoa+0x150c>
ed4: 00000000 nop
ed8: 8fc20024 lw v0,36(s8)
edc: 00000000 nop
ee0: 24420001 addiu v0,v0,1
ee4: afc20024 sw v0,36(s8)
ee8: 8fc30024 lw v1,36(s8)
eec: 8fc20050 lw v0,80(s8)
ef0: 00000000 nop
ef4: 0062102a slt v0,v1,v0
ef8: 104000b1 beqz v0,11c0 <__dtoa+0x11c0>
efc: 00000000 nop
f00: c7c200bc lwc1 $f2,188(s8)
f04: 00000000 nop
f08: c7c300b8 lwc1 $f3,184(s8)
f0c: 8f820000 lw v0,0(gp)
f0c: R_MIPS_GOT16 .rodata
f10: 00000000 nop
f14: c4400064 lwc1 $f0,100(v0)
f14: R_MIPS_LO16 .rodata
f18: 00000000 nop
f1c: c4410060 lwc1 $f1,96(v0)
f1c: R_MIPS_LO16 .rodata
f20: 00000000 nop
f24: 46201002 mul.d $f0,$f2,$f0
f28: e7c000bc swc1 $f0,188(s8)
f2c: e7c100b8 swc1 $f1,184(s8)
f30: c7c200ac lwc1 $f2,172(s8)
f34: 00000000 nop
f38: c7c300a8 lwc1 $f3,168(s8)
f3c: 8f820000 lw v0,0(gp)
f3c: R_MIPS_GOT16 .rodata
f40: 00000000 nop
f44: c4400064 lwc1 $f0,100(v0)
f44: R_MIPS_LO16 .rodata
f48: 00000000 nop
f4c: c4410060 lwc1 $f1,96(v0)
f4c: R_MIPS_LO16 .rodata
f50: 00000000 nop
f54: 46201002 mul.d $f0,$f2,$f0
f58: e7c000ac swc1 $f0,172(s8)
f5c: e7c100a8 swc1 $f1,168(s8)
f60: 1000ff98 b dc4 <__dtoa+0xdc4>
f64: 00000000 nop
f68: c7c200bc lwc1 $f2,188(s8)
f6c: 00000000 nop
f70: c7c300b8 lwc1 $f3,184(s8)
f74: 8fc20050 lw v0,80(s8)
f78: 00000000 nop
f7c: 2442ffff addiu v0,v0,-1
f80: 8f830000 lw v1,0(gp)
f80: R_MIPS_GOT16 __tens_D2A
f84: 000210c0 sll v0,v0,0x3
f88: 00621021 addu v0,v1,v0
f8c: c4400004 lwc1 $f0,4(v0)
f90: 00000000 nop
f94: c4410000 lwc1 $f1,0(v0)
f98: 00000000 nop
f9c: 46201002 mul.d $f0,$f2,$f0
fa0: e7c000bc swc1 $f0,188(s8)
fa4: e7c100b8 swc1 $f1,184(s8)
fa8: 24020001 li v0,1
fac: afc20024 sw v0,36(s8)
fb0: c7c000ac lwc1 $f0,172(s8)
fb4: 00000000 nop
fb8: c7c100a8 lwc1 $f1,168(s8)
fbc: 00000000 nop
fc0: 4442f800 cfc1 v0,$31
fc4: 4442f800 cfc1 v0,$31
fc8: 00000000 nop
fcc: 34410003 ori at,v0,0x3
fd0: 38210002 xori at,at,0x2
fd4: 44c1f800 ctc1 at,$31
fd8: 00000000 nop
fdc: 46200024 cvt.w.d $f0,$f0
fe0: 44c2f800 ctc1 v0,$31
fe4: 00000000 nop
fe8: 44020000 mfc1 v0,$f0
fec: 00000000 nop
ff0: afc20058 sw v0,88(s8)
ff4: c7c200ac lwc1 $f2,172(s8)
ff8: 00000000 nop
ffc: c7c300a8 lwc1 $f3,168(s8)
1000: 8fc20058 lw v0,88(s8)
1004: 00000000 nop
1008: 44820000 mtc1 v0,$f0
100c: 00000000 nop
1010: 46800021 cvt.d.w $f0,$f0
1014: 46201001 sub.d $f0,$f2,$f0
1018: e7c000ac swc1 $f0,172(s8)
101c: e7c100a8 swc1 $f1,168(s8)
1020: c7c000ac lwc1 $f0,172(s8)
1024: 00000000 nop
1028: c7c100a8 lwc1 $f1,168(s8)
102c: 44801000 mtc1 zero,$f2
1030: 00000000 nop
1034: 44801800 mtc1 zero,$f3
1038: 00000000 nop
103c: 46220032 c.eq.d $f0,$f2
1040: 00000000 nop
1044: 45000004 bc1f 1058 <__dtoa+0x1058>
1048: 00000000 nop
104c: 8fc20024 lw v0,36(s8)
1050: 00000000 nop
1054: afc20050 sw v0,80(s8)
1058: 8fc20058 lw v0,88(s8)
105c: 00000000 nop
1060: 304200ff andi v0,v0,0xff
1064: 24420030 addiu v0,v0,48
1068: 304400ff andi a0,v0,0xff
106c: 8fc20078 lw v0,120(s8)
1070: 00000000 nop
1074: 24430001 addiu v1,v0,1
1078: afc30078 sw v1,120(s8)
107c: 00041e00 sll v1,a0,0x18
1080: 00031e03 sra v1,v1,0x18
1084: a0430000 sb v1,0(v0)
1088: 8fc30024 lw v1,36(s8)
108c: 8fc20050 lw v0,80(s8)
1090: 00000000 nop
1094: 14620035 bne v1,v0,116c <__dtoa+0x116c>
1098: 00000000 nop
109c: c7c200ac lwc1 $f2,172(s8)
10a0: 00000000 nop
10a4: c7c300a8 lwc1 $f3,168(s8)
10a8: c7c400bc lwc1 $f4,188(s8)
10ac: 00000000 nop
10b0: c7c500b8 lwc1 $f5,184(s8)
10b4: 8f820000 lw v0,0(gp)
10b4: R_MIPS_GOT16 .rodata
10b8: 00000000 nop
10bc: c440007c lwc1 $f0,124(v0)
10bc: R_MIPS_LO16 .rodata
10c0: 00000000 nop
10c4: c4410078 lwc1 $f1,120(v0)
10c4: R_MIPS_LO16 .rodata
10c8: 00000000 nop
10cc: 46202000 add.d $f0,$f4,$f0
10d0: 4622003c c.lt.d $f0,$f2
10d4: 00000000 nop
10d8: 4501010f bc1t 1518 <__dtoa+0x1518>
10dc: 00000000 nop
10e0: c7c200ac lwc1 $f2,172(s8)
10e4: 00000000 nop
10e8: c7c300a8 lwc1 $f3,168(s8)
10ec: c7c000bc lwc1 $f0,188(s8)
10f0: 00000000 nop
10f4: c7c100b8 lwc1 $f1,184(s8)
10f8: 8f820000 lw v0,0(gp)
10f8: R_MIPS_GOT16 .rodata
10fc: 00000000 nop
1100: c444007c lwc1 $f4,124(v0)
1100: R_MIPS_LO16 .rodata
1104: 00000000 nop
1108: c4450078 lwc1 $f5,120(v0)
1108: R_MIPS_LO16 .rodata
110c: 00000000 nop
1110: 46202001 sub.d $f0,$f4,$f0
1114: 4620103c c.lt.d $f2,$f0
1118: 00000000 nop
111c: 45010003 bc1t 112c <__dtoa+0x112c>
1120: 00000000 nop
1124: 10000027 b 11c4 <__dtoa+0x11c4>
1128: 00000000 nop
112c: 8fc20078 lw v0,120(s8)
1130: 00000000 nop
1134: 2442ffff addiu v0,v0,-1
1138: afc20078 sw v0,120(s8)
113c: 8fc20078 lw v0,120(s8)
1140: 00000000 nop
1144: 80430000 lb v1,0(v0)
1148: 24020030 li v0,48
114c: 1062fff7 beq v1,v0,112c <__dtoa+0x112c>
1150: 00000000 nop
1154: 8fc20078 lw v0,120(s8)
1158: 00000000 nop
115c: 24420001 addiu v0,v0,1
1160: afc20078 sw v0,120(s8)
1164: 100005c3 b 2874 <__dtoa+0x2874>
1168: 00000000 nop
116c: 8fc20024 lw v0,36(s8)
1170: 00000000 nop
1174: 24420001 addiu v0,v0,1
1178: afc20024 sw v0,36(s8)
117c: c7c200ac lwc1 $f2,172(s8)
1180: 00000000 nop
1184: c7c300a8 lwc1 $f3,168(s8)
1188: 8f820000 lw v0,0(gp)
1188: R_MIPS_GOT16 .rodata
118c: 00000000 nop
1190: c4400064 lwc1 $f0,100(v0)
1190: R_MIPS_LO16 .rodata
1194: 00000000 nop
1198: c4410060 lwc1 $f1,96(v0)
1198: R_MIPS_LO16 .rodata
119c: 00000000 nop
11a0: 46201002 mul.d $f0,$f2,$f0
11a4: e7c000ac swc1 $f0,172(s8)
11a8: e7c100a8 swc1 $f1,168(s8)
11ac: 1000ff80 b fb0 <__dtoa+0xfb0>
11b0: 00000000 nop
11b4: 00000000 nop
11b8: 10000002 b 11c4 <__dtoa+0x11c4>
11bc: 00000000 nop
11c0: 00000000 nop
11c4: 8fc20084 lw v0,132(s8)
11c8: 00000000 nop
11cc: afc20078 sw v0,120(s8)
11d0: c7c000b4 lwc1 $f0,180(s8)
11d4: 00000000 nop
11d8: c7c100b0 lwc1 $f1,176(s8)
11dc: 00000000 nop
11e0: e7c000ac swc1 $f0,172(s8)
11e4: e7c100a8 swc1 $f1,168(s8)
11e8: 8fc20088 lw v0,136(s8)
11ec: 00000000 nop
11f0: afc20030 sw v0,48(s8)
11f4: 8fc2008c lw v0,140(s8)
11f8: 00000000 nop
11fc: afc20050 sw v0,80(s8)
1200: 8fc200a4 lw v0,164(s8)
1204: 00000000 nop
1208: 0440010a bltz v0,1634 <__dtoa+0x1634>
120c: 00000000 nop
1210: 8fc20030 lw v0,48(s8)
1214: 00000000 nop
1218: 2842000f slti v0,v0,15
121c: 10400105 beqz v0,1634 <__dtoa+0x1634>
1220: 00000000 nop
1224: 8f830000 lw v1,0(gp)
1224: R_MIPS_GOT16 __tens_D2A
1228: 8fc20030 lw v0,48(s8)
122c: 00000000 nop
1230: 000210c0 sll v0,v0,0x3
1234: 00621021 addu v0,v1,v0
1238: c4400004 lwc1 $f0,4(v0)
123c: 00000000 nop
1240: c4410000 lwc1 $f1,0(v0)
1244: 00000000 nop
1248: e7c00074 swc1 $f0,116(s8)
124c: e7c10070 swc1 $f1,112(s8)
1250: 8fc200dc lw v0,220(s8)
1254: 00000000 nop
1258: 04410020 bgez v0,12dc <__dtoa+0x12dc>
125c: 00000000 nop
1260: 8fc20050 lw v0,80(s8)
1264: 00000000 nop
1268: 1c40001c bgtz v0,12dc <__dtoa+0x12dc>
126c: 00000000 nop
1270: afc00064 sw zero,100(s8)
1274: 8fc20064 lw v0,100(s8)
1278: 00000000 nop
127c: afc20068 sw v0,104(s8)
1280: 8fc20050 lw v0,80(s8)
1284: 00000000 nop
1288: 044002ce bltz v0,1dc4 <__dtoa+0x1dc4>
128c: 00000000 nop
1290: c7c200ac lwc1 $f2,172(s8)
1294: 00000000 nop
1298: c7c300a8 lwc1 $f3,168(s8)
129c: c7c40074 lwc1 $f4,116(s8)
12a0: 00000000 nop
12a4: c7c50070 lwc1 $f5,112(s8)
12a8: 8f820000 lw v0,0(gp)
12a8: R_MIPS_GOT16 .rodata
12ac: 00000000 nop
12b0: c4400074 lwc1 $f0,116(v0)
12b0: R_MIPS_LO16 .rodata
12b4: 00000000 nop
12b8: c4410070 lwc1 $f1,112(v0)
12b8: R_MIPS_LO16 .rodata
12bc: 00000000 nop
12c0: 46202002 mul.d $f0,$f4,$f0
12c4: 4620103e c.le.d $f2,$f0
12c8: 00000000 nop
12cc: 450102bd bc1t 1dc4 <__dtoa+0x1dc4>
12d0: 00000000 nop
12d4: 100002c6 b 1df0 <__dtoa+0x1df0>
12d8: 00000000 nop
12dc: 24020001 li v0,1
12e0: afc20024 sw v0,36(s8)
12e4: c7c200ac lwc1 $f2,172(s8)
12e8: 00000000 nop
12ec: c7c300a8 lwc1 $f3,168(s8)
12f0: c7c00074 lwc1 $f0,116(s8)
12f4: 00000000 nop
12f8: c7c10070 lwc1 $f1,112(s8)
12fc: 00000000 nop
1300: 46201003 div.d $f0,$f2,$f0
1304: 4442f800 cfc1 v0,$31
1308: 4442f800 cfc1 v0,$31
130c: 00000000 nop
1310: 34410003 ori at,v0,0x3
1314: 38210002 xori at,at,0x2
1318: 44c1f800 ctc1 at,$31
131c: 00000000 nop
1320: 46200024 cvt.w.d $f0,$f0
1324: 44c2f800 ctc1 v0,$31
1328: 00000000 nop
132c: 44020000 mfc1 v0,$f0
1330: 00000000 nop
1334: afc20058 sw v0,88(s8)
1338: c7c200ac lwc1 $f2,172(s8)
133c: 00000000 nop
1340: c7c300a8 lwc1 $f3,168(s8)
1344: 8fc20058 lw v0,88(s8)
1348: 00000000 nop
134c: 44820000 mtc1 v0,$f0
1350: 00000000 nop
1354: 46800121 cvt.d.w $f4,$f0
1358: c7c00074 lwc1 $f0,116(s8)
135c: 00000000 nop
1360: c7c10070 lwc1 $f1,112(s8)
1364: 00000000 nop
1368: 46202002 mul.d $f0,$f4,$f0
136c: 46201001 sub.d $f0,$f2,$f0
1370: e7c000ac swc1 $f0,172(s8)
1374: e7c100a8 swc1 $f1,168(s8)
1378: c7c000ac lwc1 $f0,172(s8)
137c: 00000000 nop
1380: c7c100a8 lwc1 $f1,168(s8)
1384: 44801000 mtc1 zero,$f2
1388: 00000000 nop
138c: 44801800 mtc1 zero,$f3
1390: 00000000 nop
1394: 4622003c c.lt.d $f0,$f2
1398: 00000000 nop
139c: 4500000f bc1f 13dc <__dtoa+0x13dc>
13a0: 00000000 nop
13a4: 8fc20058 lw v0,88(s8)
13a8: 00000000 nop
13ac: 2442ffff addiu v0,v0,-1
13b0: afc20058 sw v0,88(s8)
13b4: c7c200ac lwc1 $f2,172(s8)
13b8: 00000000 nop
13bc: c7c300a8 lwc1 $f3,168(s8)
13c0: c7c00074 lwc1 $f0,116(s8)
13c4: 00000000 nop
13c8: c7c10070 lwc1 $f1,112(s8)
13cc: 00000000 nop
13d0: 46201000 add.d $f0,$f2,$f0
13d4: e7c000ac swc1 $f0,172(s8)
13d8: e7c100a8 swc1 $f1,168(s8)
13dc: 8fc20058 lw v0,88(s8)
13e0: 00000000 nop
13e4: 304200ff andi v0,v0,0xff
13e8: 24420030 addiu v0,v0,48
13ec: 304400ff andi a0,v0,0xff
13f0: 8fc20078 lw v0,120(s8)
13f4: 00000000 nop
13f8: 24430001 addiu v1,v0,1
13fc: afc30078 sw v1,120(s8)
1400: 00041e00 sll v1,a0,0x18
1404: 00031e03 sra v1,v1,0x18
1408: a0430000 sb v1,0(v0)
140c: c7c000ac lwc1 $f0,172(s8)
1410: 00000000 nop
1414: c7c100a8 lwc1 $f1,168(s8)
1418: 44801000 mtc1 zero,$f2
141c: 00000000 nop
1420: 44801800 mtc1 zero,$f3
1424: 00000000 nop
1428: 46220032 c.eq.d $f0,$f2
142c: 00000000 nop
1430: 4501007a bc1t 161c <__dtoa+0x161c>
1434: 00000000 nop
1438: 8fc30024 lw v1,36(s8)
143c: 8fc20050 lw v0,80(s8)
1440: 00000000 nop
1444: 14620063 bne v1,v0,15d4 <__dtoa+0x15d4>
1448: 00000000 nop
144c: 8fc200d8 lw v0,216(s8)
1450: 00000000 nop
1454: 28420002 slti v0,v0,2
1458: 14400008 bnez v0,147c <__dtoa+0x147c>
145c: 00000000 nop
1460: 8fc2007c lw v0,124(s8)
1464: 00000000 nop
1468: 104004fe beqz v0,2864 <__dtoa+0x2864>
146c: 00000000 nop
1470: 24030002 li v1,2
1474: 1043002b beq v0,v1,1524 <__dtoa+0x1524>
1478: 00000000 nop
147c: c7c000ac lwc1 $f0,172(s8)
1480: 00000000 nop
1484: c7c100a8 lwc1 $f1,168(s8)
1488: 00000000 nop
148c: 46200000 add.d $f0,$f0,$f0
1490: e7c000ac swc1 $f0,172(s8)
1494: e7c100a8 swc1 $f1,168(s8)
1498: c7c000ac lwc1 $f0,172(s8)
149c: 00000000 nop
14a0: c7c100a8 lwc1 $f1,168(s8)
14a4: c7c20074 lwc1 $f2,116(s8)
14a8: 00000000 nop
14ac: c7c30070 lwc1 $f3,112(s8)
14b0: 00000000 nop
14b4: 4620103c c.lt.d $f2,$f0
14b8: 00000000 nop
14bc: 4501001c bc1t 1530 <__dtoa+0x1530>
14c0: 00000000 nop
14c4: c7c000ac lwc1 $f0,172(s8)
14c8: 00000000 nop
14cc: c7c100a8 lwc1 $f1,168(s8)
14d0: c7c20074 lwc1 $f2,116(s8)
14d4: 00000000 nop
14d8: c7c30070 lwc1 $f3,112(s8)
14dc: 00000000 nop
14e0: 46201032 c.eq.d $f2,$f0
14e4: 00000000 nop
14e8: 4500004f bc1f 1628 <__dtoa+0x1628>
14ec: 00000000 nop
14f0: 8fc20058 lw v0,88(s8)
14f4: 00000000 nop
14f8: 30420001 andi v0,v0,0x1
14fc: 1040004a beqz v0,1628 <__dtoa+0x1628>
1500: 00000000 nop
1504: 1000000a b 1530 <__dtoa+0x1530>
1508: 00000000 nop
150c: 00000000 nop
1510: 10000018 b 1574 <__dtoa+0x1574>
1514: 00000000 nop
1518: 00000000 nop
151c: 10000015 b 1574 <__dtoa+0x1574>
1520: 00000000 nop
1524: 00000000 nop
1528: 10000012 b 1574 <__dtoa+0x1574>
152c: 00000000 nop
1530: 00000000 nop
1534: 1000000f b 1574 <__dtoa+0x1574>
1538: 00000000 nop
153c: 8fc30078 lw v1,120(s8)
1540: 8fc20084 lw v0,132(s8)
1544: 00000000 nop
1548: 1462000a bne v1,v0,1574 <__dtoa+0x1574>
154c: 00000000 nop
1550: 8fc20030 lw v0,48(s8)
1554: 00000000 nop
1558: 24420001 addiu v0,v0,1
155c: afc20030 sw v0,48(s8)
1560: 8fc20078 lw v0,120(s8)
1564: 24030030 li v1,48
1568: a0430000 sb v1,0(v0)
156c: 1000000b b 159c <__dtoa+0x159c>
1570: 00000000 nop
1574: 8fc20078 lw v0,120(s8)
1578: 00000000 nop
157c: 2442ffff addiu v0,v0,-1
1580: afc20078 sw v0,120(s8)
1584: 8fc20078 lw v0,120(s8)
1588: 00000000 nop
158c: 80430000 lb v1,0(v0)
1590: 24020039 li v0,57
1594: 1062ffe9 beq v1,v0,153c <__dtoa+0x153c>
1598: 00000000 nop
159c: 8fc20078 lw v0,120(s8)
15a0: 00000000 nop
15a4: 24430001 addiu v1,v0,1
15a8: afc30078 sw v1,120(s8)
15ac: 80430000 lb v1,0(v0)
15b0: 00000000 nop
15b4: 306300ff andi v1,v1,0xff
15b8: 24630001 addiu v1,v1,1
15bc: 306300ff andi v1,v1,0xff
15c0: 00031e00 sll v1,v1,0x18
15c4: 00031e03 sra v1,v1,0x18
15c8: a0430000 sb v1,0(v0)
15cc: 10000016 b 1628 <__dtoa+0x1628>
15d0: 00000000 nop
15d4: 8fc20024 lw v0,36(s8)
15d8: 00000000 nop
15dc: 24420001 addiu v0,v0,1
15e0: afc20024 sw v0,36(s8)
15e4: c7c200ac lwc1 $f2,172(s8)
15e8: 00000000 nop
15ec: c7c300a8 lwc1 $f3,168(s8)
15f0: 8f820000 lw v0,0(gp)
15f0: R_MIPS_GOT16 .rodata
15f4: 00000000 nop
15f8: c4400064 lwc1 $f0,100(v0)
15f8: R_MIPS_LO16 .rodata
15fc: 00000000 nop
1600: c4410060 lwc1 $f1,96(v0)
1600: R_MIPS_LO16 .rodata
1604: 00000000 nop
1608: 46201002 mul.d $f0,$f2,$f0
160c: e7c000ac swc1 $f0,172(s8)
1610: e7c100a8 swc1 $f1,168(s8)
1614: 1000ff33 b 12e4 <__dtoa+0x12e4>
1618: 00000000 nop
161c: 00000000 nop
1620: 10000494 b 2874 <__dtoa+0x2874>
1624: 00000000 nop
1628: 00000000 nop
162c: 10000491 b 2874 <__dtoa+0x2874>
1630: 00000000 nop
1634: 8fc20018 lw v0,24(s8)
1638: 00000000 nop
163c: afc2003c sw v0,60(s8)
1640: 8fc2001c lw v0,28(s8)
1644: 00000000 nop
1648: afc20094 sw v0,148(s8)
164c: afc0006c sw zero,108(s8)
1650: 8fc2006c lw v0,108(s8)
1654: 00000000 nop
1658: afc20064 sw v0,100(s8)
165c: 8fc20038 lw v0,56(s8)
1660: 00000000 nop
1664: 10400027 beqz v0,1704 <__dtoa+0x1704>
1668: 00000000 nop
166c: 8fc2005c lw v0,92(s8)
1670: 00000000 nop
1674: 10400006 beqz v0,1690 <__dtoa+0x1690>
1678: 00000000 nop
167c: 8fc200a4 lw v0,164(s8)
1680: 00000000 nop
1684: 24420433 addiu v0,v0,1075
1688: 10000004 b 169c <__dtoa+0x169c>
168c: 00000000 nop
1690: 8fc200a0 lw v0,160(s8)
1694: 24030036 li v1,54
1698: 00621023 subu v0,v1,v0
169c: afc20024 sw v0,36(s8)
16a0: 8fc30018 lw v1,24(s8)
16a4: 8fc20024 lw v0,36(s8)
16a8: 00000000 nop
16ac: 00621021 addu v0,v1,v0
16b0: afc20018 sw v0,24(s8)
16b4: 8fc30040 lw v1,64(s8)
16b8: 8fc20024 lw v0,36(s8)
16bc: 00000000 nop
16c0: 00621021 addu v0,v1,v0
16c4: afc20040 sw v0,64(s8)
16c8: 24040001 li a0,1
16cc: 8f820000 lw v0,0(gp)
16cc: R_MIPS_CALL16 __i2b_D2A
16d0: 00000000 nop
16d4: 0040c825 move t9,v0
16d8: 0320f809 jalr t9
16d8: R_MIPS_JALR __i2b_D2A
16dc: 00000000 nop
16e0: 8fdc0010 lw gp,16(s8)
16e4: afc20064 sw v0,100(s8)
16e8: 8fc20064 lw v0,100(s8)
16ec: 00000000 nop
16f0: 14400004 bnez v0,1704 <__dtoa+0x1704>
16f4: 00000000 nop
16f8: 00001025 move v0,zero
16fc: 10000482 b 2908 <__dtoa+0x2908>
1700: 00000000 nop
1704: 8fc2003c lw v0,60(s8)
1708: 00000000 nop
170c: 1840001c blez v0,1780 <__dtoa+0x1780>
1710: 00000000 nop
1714: 8fc20040 lw v0,64(s8)
1718: 00000000 nop
171c: 18400018 blez v0,1780 <__dtoa+0x1780>
1720: 00000000 nop
1724: 8fc3003c lw v1,60(s8)
1728: 8fc20040 lw v0,64(s8)
172c: 00000000 nop
1730: 0062202a slt a0,v1,v0
1734: 10800002 beqz a0,1740 <__dtoa+0x1740>
1738: 00000000 nop
173c: 00601025 move v0,v1
1740: afc20024 sw v0,36(s8)
1744: 8fc30018 lw v1,24(s8)
1748: 8fc20024 lw v0,36(s8)
174c: 00000000 nop
1750: 00621023 subu v0,v1,v0
1754: afc20018 sw v0,24(s8)
1758: 8fc3003c lw v1,60(s8)
175c: 8fc20024 lw v0,36(s8)
1760: 00000000 nop
1764: 00621023 subu v0,v1,v0
1768: afc2003c sw v0,60(s8)
176c: 8fc30040 lw v1,64(s8)
1770: 8fc20024 lw v0,36(s8)
1774: 00000000 nop
1778: 00621023 subu v0,v1,v0
177c: afc20040 sw v0,64(s8)
1780: 8fc2001c lw v0,28(s8)
1784: 00000000 nop
1788: 1840005c blez v0,18fc <__dtoa+0x18fc>
178c: 00000000 nop
1790: 8fc20038 lw v0,56(s8)
1794: 00000000 nop
1798: 10400048 beqz v0,18bc <__dtoa+0x18bc>
179c: 00000000 nop
17a0: 8fc20094 lw v0,148(s8)
17a4: 00000000 nop
17a8: 1840002b blez v0,1858 <__dtoa+0x1858>
17ac: 00000000 nop
17b0: 8fc50094 lw a1,148(s8)
17b4: 8fc40064 lw a0,100(s8)
17b8: 8f820000 lw v0,0(gp)
17b8: R_MIPS_CALL16 __pow5mult_D2A
17bc: 00000000 nop
17c0: 0040c825 move t9,v0
17c4: 0320f809 jalr t9
17c4: R_MIPS_JALR __pow5mult_D2A
17c8: 00000000 nop
17cc: 8fdc0010 lw gp,16(s8)
17d0: afc20064 sw v0,100(s8)
17d4: 8fc20064 lw v0,100(s8)
17d8: 00000000 nop
17dc: 14400004 bnez v0,17f0 <__dtoa+0x17f0>
17e0: 00000000 nop
17e4: 00001025 move v0,zero
17e8: 10000447 b 2908 <__dtoa+0x2908>
17ec: 00000000 nop
17f0: 8fc50060 lw a1,96(s8)
17f4: 8fc40064 lw a0,100(s8)
17f8: 8f820000 lw v0,0(gp)
17f8: R_MIPS_CALL16 __mult_D2A
17fc: 00000000 nop
1800: 0040c825 move t9,v0
1804: 0320f809 jalr t9
1804: R_MIPS_JALR __mult_D2A
1808: 00000000 nop
180c: 8fdc0010 lw gp,16(s8)
1810: afc20098 sw v0,152(s8)
1814: 8fc20098 lw v0,152(s8)
1818: 00000000 nop
181c: 14400004 bnez v0,1830 <__dtoa+0x1830>
1820: 00000000 nop
1824: 00001025 move v0,zero
1828: 10000437 b 2908 <__dtoa+0x2908>
182c: 00000000 nop
1830: 8fc40060 lw a0,96(s8)
1834: 8f820000 lw v0,0(gp)
1834: R_MIPS_CALL16 __Bfree_D2A
1838: 00000000 nop
183c: 0040c825 move t9,v0
1840: 0320f809 jalr t9
1840: R_MIPS_JALR __Bfree_D2A
1844: 00000000 nop
1848: 8fdc0010 lw gp,16(s8)
184c: 8fc20098 lw v0,152(s8)
1850: 00000000 nop
1854: afc20060 sw v0,96(s8)
1858: 8fc3001c lw v1,28(s8)
185c: 8fc20094 lw v0,148(s8)
1860: 00000000 nop
1864: 00621023 subu v0,v1,v0
1868: afc2002c sw v0,44(s8)
186c: 8fc2002c lw v0,44(s8)
1870: 00000000 nop
1874: 10400021 beqz v0,18fc <__dtoa+0x18fc>
1878: 00000000 nop
187c: 8fc5002c lw a1,44(s8)
1880: 8fc40060 lw a0,96(s8)
1884: 8f820000 lw v0,0(gp)
1884: R_MIPS_CALL16 __pow5mult_D2A
1888: 00000000 nop
188c: 0040c825 move t9,v0
1890: 0320f809 jalr t9
1890: R_MIPS_JALR __pow5mult_D2A
1894: 00000000 nop
1898: 8fdc0010 lw gp,16(s8)
189c: afc20060 sw v0,96(s8)
18a0: 8fc20060 lw v0,96(s8)
18a4: 00000000 nop
18a8: 14400014 bnez v0,18fc <__dtoa+0x18fc>
18ac: 00000000 nop
18b0: 00001025 move v0,zero
18b4: 10000414 b 2908 <__dtoa+0x2908>
18b8: 00000000 nop
18bc: 8fc5001c lw a1,28(s8)
18c0: 8fc40060 lw a0,96(s8)
18c4: 8f820000 lw v0,0(gp)
18c4: R_MIPS_CALL16 __pow5mult_D2A
18c8: 00000000 nop
18cc: 0040c825 move t9,v0
18d0: 0320f809 jalr t9
18d0: R_MIPS_JALR __pow5mult_D2A
18d4: 00000000 nop
18d8: 8fdc0010 lw gp,16(s8)
18dc: afc20060 sw v0,96(s8)
18e0: 8fc20060 lw v0,96(s8)
18e4: 00000000 nop
18e8: 14400004 bnez v0,18fc <__dtoa+0x18fc>
18ec: 00000000 nop
18f0: 00001025 move v0,zero
18f4: 10000404 b 2908 <__dtoa+0x2908>
18f8: 00000000 nop
18fc: 24040001 li a0,1
1900: 8f820000 lw v0,0(gp)
1900: R_MIPS_CALL16 __i2b_D2A
1904: 00000000 nop
1908: 0040c825 move t9,v0
190c: 0320f809 jalr t9
190c: R_MIPS_JALR __i2b_D2A
1910: 00000000 nop
1914: 8fdc0010 lw gp,16(s8)
1918: afc20068 sw v0,104(s8)
191c: 8fc20068 lw v0,104(s8)
1920: 00000000 nop
1924: 14400004 bnez v0,1938 <__dtoa+0x1938>
1928: 00000000 nop
192c: 00001025 move v0,zero
1930: 100003f5 b 2908 <__dtoa+0x2908>
1934: 00000000 nop
1938: 8fc20044 lw v0,68(s8)
193c: 00000000 nop
1940: 18400011 blez v0,1988 <__dtoa+0x1988>
1944: 00000000 nop
1948: 8fc50044 lw a1,68(s8)
194c: 8fc40068 lw a0,104(s8)
1950: 8f820000 lw v0,0(gp)
1950: R_MIPS_CALL16 __pow5mult_D2A
1954: 00000000 nop
1958: 0040c825 move t9,v0
195c: 0320f809 jalr t9
195c: R_MIPS_JALR __pow5mult_D2A
1960: 00000000 nop
1964: 8fdc0010 lw gp,16(s8)
1968: afc20068 sw v0,104(s8)
196c: 8fc20068 lw v0,104(s8)
1970: 00000000 nop
1974: 14400004 bnez v0,1988 <__dtoa+0x1988>
1978: 00000000 nop
197c: 00001025 move v0,zero
1980: 100003e1 b 2908 <__dtoa+0x2908>
1984: 00000000 nop
1988: afc00048 sw zero,72(s8)
198c: 8fc200d8 lw v0,216(s8)
1990: 00000000 nop
1994: 28420002 slti v0,v0,2
1998: 14400005 bnez v0,19b0 <__dtoa+0x19b0>
199c: 00000000 nop
19a0: 8fc20038 lw v0,56(s8)
19a4: 00000000 nop
19a8: 1040001e beqz v0,1a24 <__dtoa+0x1a24>
19ac: 00000000 nop
19b0: 8fc3007c lw v1,124(s8)
19b4: 24020001 li v0,1
19b8: 1462001a bne v1,v0,1a24 <__dtoa+0x1a24>
19bc: 00000000 nop
19c0: 8fc200ac lw v0,172(s8)
19c4: 00000000 nop
19c8: 14400016 bnez v0,1a24 <__dtoa+0x1a24>
19cc: 00000000 nop
19d0: 8fc300a8 lw v1,168(s8)
19d4: 3c02000f lui v0,0xf
19d8: 3442ffff ori v0,v0,0xffff
19dc: 00621024 and v0,v1,v0
19e0: 14400010 bnez v0,1a24 <__dtoa+0x1a24>
19e4: 00000000 nop
19e8: 8fc300a8 lw v1,168(s8)
19ec: 3c027fe0 lui v0,0x7fe0
19f0: 00621024 and v0,v1,v0
19f4: 1040000b beqz v0,1a24 <__dtoa+0x1a24>
19f8: 00000000 nop
19fc: 8fc20018 lw v0,24(s8)
1a00: 00000000 nop
1a04: 24420001 addiu v0,v0,1
1a08: afc20018 sw v0,24(s8)
1a0c: 8fc20040 lw v0,64(s8)
1a10: 00000000 nop
1a14: 24420001 addiu v0,v0,1
1a18: afc20040 sw v0,64(s8)
1a1c: 24020001 li v0,1
1a20: afc20048 sw v0,72(s8)
1a24: 8fc20044 lw v0,68(s8)
1a28: 00000000 nop
1a2c: 10400018 beqz v0,1a90 <__dtoa+0x1a90>
1a30: 00000000 nop
1a34: 8fc20068 lw v0,104(s8)
1a38: 00000000 nop
1a3c: 8c420010 lw v0,16(v0)
1a40: 00000000 nop
1a44: 2442ffff addiu v0,v0,-1
1a48: 8fc30068 lw v1,104(s8)
1a4c: 24420004 addiu v0,v0,4
1a50: 00021080 sll v0,v0,0x2
1a54: 00621021 addu v0,v1,v0
1a58: 8c420004 lw v0,4(v0)
1a5c: 00000000 nop
1a60: 00402025 move a0,v0
1a64: 8f820000 lw v0,0(gp)
1a64: R_MIPS_CALL16 __hi0bits_D2A
1a68: 00000000 nop
1a6c: 0040c825 move t9,v0
1a70: 0320f809 jalr t9
1a70: R_MIPS_JALR __hi0bits_D2A
1a74: 00000000 nop
1a78: 8fdc0010 lw gp,16(s8)
1a7c: 00401825 move v1,v0
1a80: 24020020 li v0,32
1a84: 00431023 subu v0,v0,v1
1a88: 10000002 b 1a94 <__dtoa+0x1a94>
1a8c: 00000000 nop
1a90: 24020001 li v0,1
1a94: 8fc30040 lw v1,64(s8)
1a98: 00000000 nop
1a9c: 00431021 addu v0,v0,v1
1aa0: 3042001f andi v0,v0,0x1f
1aa4: afc20024 sw v0,36(s8)
1aa8: 8fc20024 lw v0,36(s8)
1aac: 00000000 nop
1ab0: 10400006 beqz v0,1acc <__dtoa+0x1acc>
1ab4: 00000000 nop
1ab8: 24030020 li v1,32
1abc: 8fc20024 lw v0,36(s8)
1ac0: 00000000 nop
1ac4: 00621023 subu v0,v1,v0
1ac8: afc20024 sw v0,36(s8)
1acc: 8fc20024 lw v0,36(s8)
1ad0: 00000000 nop
1ad4: 28420005 slti v0,v0,5
1ad8: 14400016 bnez v0,1b34 <__dtoa+0x1b34>
1adc: 00000000 nop
1ae0: 8fc20024 lw v0,36(s8)
1ae4: 00000000 nop
1ae8: 2442fffc addiu v0,v0,-4
1aec: afc20024 sw v0,36(s8)
1af0: 8fc30018 lw v1,24(s8)
1af4: 8fc20024 lw v0,36(s8)
1af8: 00000000 nop
1afc: 00621021 addu v0,v1,v0
1b00: afc20018 sw v0,24(s8)
1b04: 8fc3003c lw v1,60(s8)
1b08: 8fc20024 lw v0,36(s8)
1b0c: 00000000 nop
1b10: 00621021 addu v0,v1,v0
1b14: afc2003c sw v0,60(s8)
1b18: 8fc30040 lw v1,64(s8)
1b1c: 8fc20024 lw v0,36(s8)
1b20: 00000000 nop
1b24: 00621021 addu v0,v1,v0
1b28: afc20040 sw v0,64(s8)
1b2c: 10000019 b 1b94 <__dtoa+0x1b94>
1b30: 00000000 nop
1b34: 8fc20024 lw v0,36(s8)
1b38: 00000000 nop
1b3c: 28420004 slti v0,v0,4
1b40: 10400014 beqz v0,1b94 <__dtoa+0x1b94>
1b44: 00000000 nop
1b48: 8fc20024 lw v0,36(s8)
1b4c: 00000000 nop
1b50: 2442001c addiu v0,v0,28
1b54: afc20024 sw v0,36(s8)
1b58: 8fc30018 lw v1,24(s8)
1b5c: 8fc20024 lw v0,36(s8)
1b60: 00000000 nop
1b64: 00621021 addu v0,v1,v0
1b68: afc20018 sw v0,24(s8)
1b6c: 8fc3003c lw v1,60(s8)
1b70: 8fc20024 lw v0,36(s8)
1b74: 00000000 nop
1b78: 00621021 addu v0,v1,v0
1b7c: afc2003c sw v0,60(s8)
1b80: 8fc30040 lw v1,64(s8)
1b84: 8fc20024 lw v0,36(s8)
1b88: 00000000 nop
1b8c: 00621021 addu v0,v1,v0
1b90: afc20040 sw v0,64(s8)
1b94: 8fc20018 lw v0,24(s8)
1b98: 00000000 nop
1b9c: 18400011 blez v0,1be4 <__dtoa+0x1be4>
1ba0: 00000000 nop
1ba4: 8fc50018 lw a1,24(s8)
1ba8: 8fc40060 lw a0,96(s8)
1bac: 8f820000 lw v0,0(gp)
1bac: R_MIPS_CALL16 __lshift_D2A
1bb0: 00000000 nop
1bb4: 0040c825 move t9,v0
1bb8: 0320f809 jalr t9
1bb8: R_MIPS_JALR __lshift_D2A
1bbc: 00000000 nop
1bc0: 8fdc0010 lw gp,16(s8)
1bc4: afc20060 sw v0,96(s8)
1bc8: 8fc20060 lw v0,96(s8)
1bcc: 00000000 nop
1bd0: 14400004 bnez v0,1be4 <__dtoa+0x1be4>
1bd4: 00000000 nop
1bd8: 00001025 move v0,zero
1bdc: 1000034a b 2908 <__dtoa+0x2908>
1be0: 00000000 nop
1be4: 8fc20040 lw v0,64(s8)
1be8: 00000000 nop
1bec: 18400011 blez v0,1c34 <__dtoa+0x1c34>
1bf0: 00000000 nop
1bf4: 8fc50040 lw a1,64(s8)
1bf8: 8fc40068 lw a0,104(s8)
1bfc: 8f820000 lw v0,0(gp)
1bfc: R_MIPS_CALL16 __lshift_D2A
1c00: 00000000 nop
1c04: 0040c825 move t9,v0
1c08: 0320f809 jalr t9
1c08: R_MIPS_JALR __lshift_D2A
1c0c: 00000000 nop
1c10: 8fdc0010 lw gp,16(s8)
1c14: afc20068 sw v0,104(s8)
1c18: 8fc20068 lw v0,104(s8)
1c1c: 00000000 nop
1c20: 14400004 bnez v0,1c34 <__dtoa+0x1c34>
1c24: 00000000 nop
1c28: 00001025 move v0,zero
1c2c: 10000336 b 2908 <__dtoa+0x2908>
1c30: 00000000 nop
1c34: 8fc20034 lw v0,52(s8)
1c38: 00000000 nop
1c3c: 10400038 beqz v0,1d20 <__dtoa+0x1d20>
1c40: 00000000 nop
1c44: 8fc50068 lw a1,104(s8)
1c48: 8fc40060 lw a0,96(s8)
1c4c: 8f820000 lw v0,0(gp)
1c4c: R_MIPS_CALL16 __cmp_D2A
1c50: 00000000 nop
1c54: 0040c825 move t9,v0
1c58: 0320f809 jalr t9
1c58: R_MIPS_JALR __cmp_D2A
1c5c: 00000000 nop
1c60: 8fdc0010 lw gp,16(s8)
1c64: 0441002e bgez v0,1d20 <__dtoa+0x1d20>
1c68: 00000000 nop
1c6c: 8fc20030 lw v0,48(s8)
1c70: 00000000 nop
1c74: 2442ffff addiu v0,v0,-1
1c78: afc20030 sw v0,48(s8)
1c7c: 00003025 move a2,zero
1c80: 2405000a li a1,10
1c84: 8fc40060 lw a0,96(s8)
1c88: 8f820000 lw v0,0(gp)
1c88: R_MIPS_CALL16 __multadd_D2A
1c8c: 00000000 nop
1c90: 0040c825 move t9,v0
1c94: 0320f809 jalr t9
1c94: R_MIPS_JALR __multadd_D2A
1c98: 00000000 nop
1c9c: 8fdc0010 lw gp,16(s8)
1ca0: afc20060 sw v0,96(s8)
1ca4: 8fc20060 lw v0,96(s8)
1ca8: 00000000 nop
1cac: 14400004 bnez v0,1cc0 <__dtoa+0x1cc0>
1cb0: 00000000 nop
1cb4: 00001025 move v0,zero
1cb8: 10000313 b 2908 <__dtoa+0x2908>
1cbc: 00000000 nop
1cc0: 8fc20038 lw v0,56(s8)
1cc4: 00000000 nop
1cc8: 10400012 beqz v0,1d14 <__dtoa+0x1d14>
1ccc: 00000000 nop
1cd0: 00003025 move a2,zero
1cd4: 2405000a li a1,10
1cd8: 8fc40064 lw a0,100(s8)
1cdc: 8f820000 lw v0,0(gp)
1cdc: R_MIPS_CALL16 __multadd_D2A
1ce0: 00000000 nop
1ce4: 0040c825 move t9,v0
1ce8: 0320f809 jalr t9
1ce8: R_MIPS_JALR __multadd_D2A
1cec: 00000000 nop
1cf0: 8fdc0010 lw gp,16(s8)
1cf4: afc20064 sw v0,100(s8)
1cf8: 8fc20064 lw v0,100(s8)
1cfc: 00000000 nop
1d00: 14400004 bnez v0,1d14 <__dtoa+0x1d14>
1d04: 00000000 nop
1d08: 00001025 move v0,zero
1d0c: 100002fe b 2908 <__dtoa+0x2908>
1d10: 00000000 nop
1d14: 8fc20054 lw v0,84(s8)
1d18: 00000000 nop
1d1c: afc20050 sw v0,80(s8)
1d20: 8fc20050 lw v0,80(s8)
1d24: 00000000 nop
1d28: 1c40003d bgtz v0,1e20 <__dtoa+0x1e20>
1d2c: 00000000 nop
1d30: 8fc300d8 lw v1,216(s8)
1d34: 24020003 li v0,3
1d38: 10620005 beq v1,v0,1d50 <__dtoa+0x1d50>
1d3c: 00000000 nop
1d40: 8fc300d8 lw v1,216(s8)
1d44: 24020005 li v0,5
1d48: 14620035 bne v1,v0,1e20 <__dtoa+0x1e20>
1d4c: 00000000 nop
1d50: 8fc20050 lw v0,80(s8)
1d54: 00000000 nop
1d58: 0440001a bltz v0,1dc4 <__dtoa+0x1dc4>
1d5c: 00000000 nop
1d60: 00003025 move a2,zero
1d64: 24050005 li a1,5
1d68: 8fc40068 lw a0,104(s8)
1d6c: 8f820000 lw v0,0(gp)
1d6c: R_MIPS_CALL16 __multadd_D2A
1d70: 00000000 nop
1d74: 0040c825 move t9,v0
1d78: 0320f809 jalr t9
1d78: R_MIPS_JALR __multadd_D2A
1d7c: 00000000 nop
1d80: 8fdc0010 lw gp,16(s8)
1d84: afc20068 sw v0,104(s8)
1d88: 8fc50068 lw a1,104(s8)
1d8c: 8fc40060 lw a0,96(s8)
1d90: 8f820000 lw v0,0(gp)
1d90: R_MIPS_CALL16 __cmp_D2A
1d94: 00000000 nop
1d98: 0040c825 move t9,v0
1d9c: 0320f809 jalr t9
1d9c: R_MIPS_JALR __cmp_D2A
1da0: 00000000 nop
1da4: 8fdc0010 lw gp,16(s8)
1da8: 1c400010 bgtz v0,1dec <__dtoa+0x1dec>
1dac: 00000000 nop
1db0: 10000004 b 1dc4 <__dtoa+0x1dc4>
1db4: 00000000 nop
1db8: 00000000 nop
1dbc: 10000002 b 1dc8 <__dtoa+0x1dc8>
1dc0: 00000000 nop
1dc4: 00000000 nop
1dc8: 8fc200dc lw v0,220(s8)
1dcc: 00000000 nop
1dd0: 00021027 nor v0,zero,v0
1dd4: afc20030 sw v0,48(s8)
1dd8: 1000027b b 27c8 <__dtoa+0x27c8>
1ddc: 00000000 nop
1de0: 00000000 nop
1de4: 10000002 b 1df0 <__dtoa+0x1df0>
1de8: 00000000 nop
1dec: 00000000 nop
1df0: 8fc20078 lw v0,120(s8)
1df4: 00000000 nop
1df8: 24430001 addiu v1,v0,1
1dfc: afc30078 sw v1,120(s8)
1e00: 24030031 li v1,49
1e04: a0430000 sb v1,0(v0)
1e08: 8fc20030 lw v0,48(s8)
1e0c: 00000000 nop
1e10: 24420001 addiu v0,v0,1
1e14: afc20030 sw v0,48(s8)
1e18: 1000026b b 27c8 <__dtoa+0x27c8>
1e1c: 00000000 nop
1e20: 8fc20038 lw v0,56(s8)
1e24: 00000000 nop
1e28: 104001b8 beqz v0,250c <__dtoa+0x250c>
1e2c: 00000000 nop
1e30: 8fc2003c lw v0,60(s8)
1e34: 00000000 nop
1e38: 18400011 blez v0,1e80 <__dtoa+0x1e80>
1e3c: 00000000 nop
1e40: 8fc5003c lw a1,60(s8)
1e44: 8fc40064 lw a0,100(s8)
1e48: 8f820000 lw v0,0(gp)
1e48: R_MIPS_CALL16 __lshift_D2A
1e4c: 00000000 nop
1e50: 0040c825 move t9,v0
1e54: 0320f809 jalr t9
1e54: R_MIPS_JALR __lshift_D2A
1e58: 00000000 nop
1e5c: 8fdc0010 lw gp,16(s8)
1e60: afc20064 sw v0,100(s8)
1e64: 8fc20064 lw v0,100(s8)
1e68: 00000000 nop
1e6c: 14400004 bnez v0,1e80 <__dtoa+0x1e80>
1e70: 00000000 nop
1e74: 00001025 move v0,zero
1e78: 100002a3 b 2908 <__dtoa+0x2908>
1e7c: 00000000 nop
1e80: 8fc20064 lw v0,100(s8)
1e84: 00000000 nop
1e88: afc2006c sw v0,108(s8)
1e8c: 8fc20048 lw v0,72(s8)
1e90: 00000000 nop
1e94: 10400039 beqz v0,1f7c <__dtoa+0x1f7c>
1e98: 00000000 nop
1e9c: 8fc20064 lw v0,100(s8)
1ea0: 00000000 nop
1ea4: 8c420004 lw v0,4(v0)
1ea8: 00000000 nop
1eac: 00402025 move a0,v0
1eb0: 8f820000 lw v0,0(gp)
1eb0: R_MIPS_CALL16 __Balloc_D2A
1eb4: 00000000 nop
1eb8: 0040c825 move t9,v0
1ebc: 0320f809 jalr t9
1ebc: R_MIPS_JALR __Balloc_D2A
1ec0: 00000000 nop
1ec4: 8fdc0010 lw gp,16(s8)
1ec8: afc20064 sw v0,100(s8)
1ecc: 8fc20064 lw v0,100(s8)
1ed0: 00000000 nop
1ed4: 14400004 bnez v0,1ee8 <__dtoa+0x1ee8>
1ed8: 00000000 nop
1edc: 00001025 move v0,zero
1ee0: 10000289 b 2908 <__dtoa+0x2908>
1ee4: 00000000 nop
1ee8: 8fc20064 lw v0,100(s8)
1eec: 00000000 nop
1ef0: 2443000c addiu v1,v0,12
1ef4: 8fc2006c lw v0,108(s8)
1ef8: 00000000 nop
1efc: 2444000c addiu a0,v0,12
1f00: 8fc2006c lw v0,108(s8)
1f04: 00000000 nop
1f08: 8c420010 lw v0,16(v0)
1f0c: 00000000 nop
1f10: 24420002 addiu v0,v0,2
1f14: 00021080 sll v0,v0,0x2
1f18: 00403025 move a2,v0
1f1c: 00802825 move a1,a0
1f20: 00602025 move a0,v1
1f24: 8f820000 lw v0,0(gp)
1f24: R_MIPS_CALL16 memcpy
1f28: 00000000 nop
1f2c: 0040c825 move t9,v0
1f30: 0320f809 jalr t9
1f30: R_MIPS_JALR memcpy
1f34: 00000000 nop
1f38: 8fdc0010 lw gp,16(s8)
1f3c: 24050001 li a1,1
1f40: 8fc40064 lw a0,100(s8)
1f44: 8f820000 lw v0,0(gp)
1f44: R_MIPS_CALL16 __lshift_D2A
1f48: 00000000 nop
1f4c: 0040c825 move t9,v0
1f50: 0320f809 jalr t9
1f50: R_MIPS_JALR __lshift_D2A
1f54: 00000000 nop
1f58: 8fdc0010 lw gp,16(s8)
1f5c: afc20064 sw v0,100(s8)
1f60: 8fc20064 lw v0,100(s8)
1f64: 00000000 nop
1f68: 14400004 bnez v0,1f7c <__dtoa+0x1f7c>
1f6c: 00000000 nop
1f70: 00001025 move v0,zero
1f74: 10000264 b 2908 <__dtoa+0x2908>
1f78: 00000000 nop
1f7c: 24020001 li v0,1
1f80: afc20024 sw v0,36(s8)
1f84: 8fc50068 lw a1,104(s8)
1f88: 8fc40060 lw a0,96(s8)
1f8c: 8f820000 lw v0,0(gp)
1f8c: R_MIPS_CALL16 __quorem_D2A
1f90: 00000000 nop
1f94: 0040c825 move t9,v0
1f98: 0320f809 jalr t9
1f98: R_MIPS_JALR __quorem_D2A
1f9c: 00000000 nop
1fa0: 8fdc0010 lw gp,16(s8)
1fa4: 24420030 addiu v0,v0,48
1fa8: afc20020 sw v0,32(s8)
1fac: 8fc5006c lw a1,108(s8)
1fb0: 8fc40060 lw a0,96(s8)
1fb4: 8f820000 lw v0,0(gp)
1fb4: R_MIPS_CALL16 __cmp_D2A
1fb8: 00000000 nop
1fbc: 0040c825 move t9,v0
1fc0: 0320f809 jalr t9
1fc0: R_MIPS_JALR __cmp_D2A
1fc4: 00000000 nop
1fc8: 8fdc0010 lw gp,16(s8)
1fcc: afc2002c sw v0,44(s8)
1fd0: 8fc50064 lw a1,100(s8)
1fd4: 8fc40068 lw a0,104(s8)
1fd8: 8f820000 lw v0,0(gp)
1fd8: R_MIPS_CALL16 __diff_D2A
1fdc: 00000000 nop
1fe0: 0040c825 move t9,v0
1fe4: 0320f809 jalr t9
1fe4: R_MIPS_JALR __diff_D2A
1fe8: 00000000 nop
1fec: 8fdc0010 lw gp,16(s8)
1ff0: afc2009c sw v0,156(s8)
1ff4: 8fc2009c lw v0,156(s8)
1ff8: 00000000 nop
1ffc: 14400004 bnez v0,2010 <__dtoa+0x2010>
2000: 00000000 nop
2004: 00001025 move v0,zero
2008: 1000023f b 2908 <__dtoa+0x2908>
200c: 00000000 nop
2010: 8fc2009c lw v0,156(s8)
2014: 00000000 nop
2018: 8c42000c lw v0,12(v0)
201c: 00000000 nop
2020: 1440000b bnez v0,2050 <__dtoa+0x2050>
2024: 00000000 nop
2028: 8fc5009c lw a1,156(s8)
202c: 8fc40060 lw a0,96(s8)
2030: 8f820000 lw v0,0(gp)
2030: R_MIPS_CALL16 __cmp_D2A
2034: 00000000 nop
2038: 0040c825 move t9,v0
203c: 0320f809 jalr t9
203c: R_MIPS_JALR __cmp_D2A
2040: 00000000 nop
2044: 8fdc0010 lw gp,16(s8)
2048: 10000002 b 2054 <__dtoa+0x2054>
204c: 00000000 nop
2050: 24020001 li v0,1
2054: afc20090 sw v0,144(s8)
2058: 8fc4009c lw a0,156(s8)
205c: 8f820000 lw v0,0(gp)
205c: R_MIPS_CALL16 __Bfree_D2A
2060: 00000000 nop
2064: 0040c825 move t9,v0
2068: 0320f809 jalr t9
2068: R_MIPS_JALR __Bfree_D2A
206c: 00000000 nop
2070: 8fdc0010 lw gp,16(s8)
2074: 8fc20090 lw v0,144(s8)
2078: 00000000 nop
207c: 14400025 bnez v0,2114 <__dtoa+0x2114>
2080: 00000000 nop
2084: 8fc300d8 lw v1,216(s8)
2088: 24020001 li v0,1
208c: 10620021 beq v1,v0,2114 <__dtoa+0x2114>
2090: 00000000 nop
2094: 8fc200ac lw v0,172(s8)
2098: 00000000 nop
209c: 30420001 andi v0,v0,0x1
20a0: 1440001c bnez v0,2114 <__dtoa+0x2114>
20a4: 00000000 nop
20a8: 8fc2007c lw v0,124(s8)
20ac: 00000000 nop
20b0: 18400018 blez v0,2114 <__dtoa+0x2114>
20b4: 00000000 nop
20b8: 8fc30020 lw v1,32(s8)
20bc: 24020039 li v0,57
20c0: 10620094 beq v1,v0,2314 <__dtoa+0x2314>
20c4: 00000000 nop
20c8: 8fc2002c lw v0,44(s8)
20cc: 00000000 nop
20d0: 18400005 blez v0,20e8 <__dtoa+0x20e8>
20d4: 00000000 nop
20d8: 8fc20020 lw v0,32(s8)
20dc: 00000000 nop
20e0: 24420001 addiu v0,v0,1
20e4: afc20020 sw v0,32(s8)
20e8: 8fc20078 lw v0,120(s8)
20ec: 00000000 nop
20f0: 24430001 addiu v1,v0,1
20f4: afc30078 sw v1,120(s8)
20f8: 8fc30020 lw v1,32(s8)
20fc: 00000000 nop
2100: 00031e00 sll v1,v1,0x18
2104: 00031e03 sra v1,v1,0x18
2108: a0430000 sb v1,0(v0)
210c: 100001ae b 27c8 <__dtoa+0x27c8>
2110: 00000000 nop
2114: 8fc2002c lw v0,44(s8)
2118: 00000000 nop
211c: 0440000e bltz v0,2158 <__dtoa+0x2158>
2120: 00000000 nop
2124: 8fc2002c lw v0,44(s8)
2128: 00000000 nop
212c: 1440006b bnez v0,22dc <__dtoa+0x22dc>
2130: 00000000 nop
2134: 8fc300d8 lw v1,216(s8)
2138: 24020001 li v0,1
213c: 10620067 beq v1,v0,22dc <__dtoa+0x22dc>
2140: 00000000 nop
2144: 8fc200ac lw v0,172(s8)
2148: 00000000 nop
214c: 30420001 andi v0,v0,0x1
2150: 14400062 bnez v0,22dc <__dtoa+0x22dc>
2154: 00000000 nop
2158: 8fc20060 lw v0,96(s8)
215c: 00000000 nop
2160: 8c420014 lw v0,20(v0)
2164: 00000000 nop
2168: 14400008 bnez v0,218c <__dtoa+0x218c>
216c: 00000000 nop
2170: 8fc20060 lw v0,96(s8)
2174: 00000000 nop
2178: 8c420010 lw v0,16(v0)
217c: 00000000 nop
2180: 28420002 slti v0,v0,2
2184: 14400040 bnez v0,2288 <__dtoa+0x2288>
2188: 00000000 nop
218c: 8fc200d8 lw v0,216(s8)
2190: 00000000 nop
2194: 28420002 slti v0,v0,2
2198: 14400008 bnez v0,21bc <__dtoa+0x21bc>
219c: 00000000 nop
21a0: 8fc2007c lw v0,124(s8)
21a4: 00000000 nop
21a8: 1040003a beqz v0,2294 <__dtoa+0x2294>
21ac: 00000000 nop
21b0: 24030002 li v1,2
21b4: 10430071 beq v0,v1,237c <__dtoa+0x237c>
21b8: 00000000 nop
21bc: 8fc20090 lw v0,144(s8)
21c0: 00000000 nop
21c4: 18400036 blez v0,22a0 <__dtoa+0x22a0>
21c8: 00000000 nop
21cc: 24050001 li a1,1
21d0: 8fc40060 lw a0,96(s8)
21d4: 8f820000 lw v0,0(gp)
21d4: R_MIPS_CALL16 __lshift_D2A
21d8: 00000000 nop
21dc: 0040c825 move t9,v0
21e0: 0320f809 jalr t9
21e0: R_MIPS_JALR __lshift_D2A
21e4: 00000000 nop
21e8: 8fdc0010 lw gp,16(s8)
21ec: afc20060 sw v0,96(s8)
21f0: 8fc20060 lw v0,96(s8)
21f4: 00000000 nop
21f8: 14400004 bnez v0,220c <__dtoa+0x220c>
21fc: 00000000 nop
2200: 00001025 move v0,zero
2204: 100001c0 b 2908 <__dtoa+0x2908>
2208: 00000000 nop
220c: 8fc50068 lw a1,104(s8)
2210: 8fc40060 lw a0,96(s8)
2214: 8f820000 lw v0,0(gp)
2214: R_MIPS_CALL16 __cmp_D2A
2218: 00000000 nop
221c: 0040c825 move t9,v0
2220: 0320f809 jalr t9
2220: R_MIPS_JALR __cmp_D2A
2224: 00000000 nop
2228: 8fdc0010 lw gp,16(s8)
222c: afc20090 sw v0,144(s8)
2230: 8fc20090 lw v0,144(s8)
2234: 00000000 nop
2238: 1c40000a bgtz v0,2264 <__dtoa+0x2264>
223c: 00000000 nop
2240: 8fc20090 lw v0,144(s8)
2244: 00000000 nop
2248: 14400015 bnez v0,22a0 <__dtoa+0x22a0>
224c: 00000000 nop
2250: 8fc20020 lw v0,32(s8)
2254: 00000000 nop
2258: 30420001 andi v0,v0,0x1
225c: 10400010 beqz v0,22a0 <__dtoa+0x22a0>
2260: 00000000 nop
2264: 8fc20020 lw v0,32(s8)
2268: 00000000 nop
226c: 24430001 addiu v1,v0,1
2270: afc30020 sw v1,32(s8)
2274: 24030039 li v1,57
2278: 10430029 beq v0,v1,2320 <__dtoa+0x2320>
227c: 00000000 nop
2280: 10000007 b 22a0 <__dtoa+0x22a0>
2284: 00000000 nop
2288: 00000000 nop
228c: 10000008 b 22b0 <__dtoa+0x22b0>
2290: 00000000 nop
2294: 00000000 nop
2298: 10000005 b 22b0 <__dtoa+0x22b0>
229c: 00000000 nop
22a0: 00000000 nop
22a4: 10000002 b 22b0 <__dtoa+0x22b0>
22a8: 00000000 nop
22ac: 00000000 nop
22b0: 8fc20078 lw v0,120(s8)
22b4: 00000000 nop
22b8: 24430001 addiu v1,v0,1
22bc: afc30078 sw v1,120(s8)
22c0: 8fc30020 lw v1,32(s8)
22c4: 00000000 nop
22c8: 00031e00 sll v1,v1,0x18
22cc: 00031e03 sra v1,v1,0x18
22d0: a0430000 sb v1,0(v0)
22d4: 1000013c b 27c8 <__dtoa+0x27c8>
22d8: 00000000 nop
22dc: 8fc20090 lw v0,144(s8)
22e0: 00000000 nop
22e4: 18400028 blez v0,2388 <__dtoa+0x2388>
22e8: 00000000 nop
22ec: 8fc2007c lw v0,124(s8)
22f0: 00000000 nop
22f4: 1040ffed beqz v0,22ac <__dtoa+0x22ac>
22f8: 00000000 nop
22fc: 8fc30020 lw v1,32(s8)
2300: 24020039 li v0,57
2304: 1462000f bne v1,v0,2344 <__dtoa+0x2344>
2308: 00000000 nop
230c: 10000005 b 2324 <__dtoa+0x2324>
2310: 00000000 nop
2314: 00000000 nop
2318: 10000002 b 2324 <__dtoa+0x2324>
231c: 00000000 nop
2320: 00000000 nop
2324: 8fc20078 lw v0,120(s8)
2328: 00000000 nop
232c: 24430001 addiu v1,v0,1
2330: afc30078 sw v1,120(s8)
2334: 24030039 li v1,57
2338: a0430000 sb v1,0(v0)
233c: 100000e2 b 26c8 <__dtoa+0x26c8>
2340: 00000000 nop
2344: 8fc20020 lw v0,32(s8)
2348: 00000000 nop
234c: 304200ff andi v0,v0,0xff
2350: 24420001 addiu v0,v0,1
2354: 304400ff andi a0,v0,0xff
2358: 8fc20078 lw v0,120(s8)
235c: 00000000 nop
2360: 24430001 addiu v1,v0,1
2364: afc30078 sw v1,120(s8)
2368: 00041e00 sll v1,a0,0x18
236c: 00031e03 sra v1,v1,0x18
2370: a0430000 sb v1,0(v0)
2374: 10000114 b 27c8 <__dtoa+0x27c8>
2378: 00000000 nop
237c: 00000000 nop
2380: 10000002 b 238c <__dtoa+0x238c>
2384: 00000000 nop
2388: 00000000 nop
238c: 8fc20078 lw v0,120(s8)
2390: 00000000 nop
2394: 24430001 addiu v1,v0,1
2398: afc30078 sw v1,120(s8)
239c: 8fc30020 lw v1,32(s8)
23a0: 00000000 nop
23a4: 00031e00 sll v1,v1,0x18
23a8: 00031e03 sra v1,v1,0x18
23ac: a0430000 sb v1,0(v0)
23b0: 8fc30024 lw v1,36(s8)
23b4: 8fc20050 lw v0,80(s8)
23b8: 00000000 nop
23bc: 10620092 beq v1,v0,2608 <__dtoa+0x2608>
23c0: 00000000 nop
23c4: 00003025 move a2,zero
23c8: 2405000a li a1,10
23cc: 8fc40060 lw a0,96(s8)
23d0: 8f820000 lw v0,0(gp)
23d0: R_MIPS_CALL16 __multadd_D2A
23d4: 00000000 nop
23d8: 0040c825 move t9,v0
23dc: 0320f809 jalr t9
23dc: R_MIPS_JALR __multadd_D2A
23e0: 00000000 nop
23e4: 8fdc0010 lw gp,16(s8)
23e8: afc20060 sw v0,96(s8)
23ec: 8fc20060 lw v0,96(s8)
23f0: 00000000 nop
23f4: 14400004 bnez v0,2408 <__dtoa+0x2408>
23f8: 00000000 nop
23fc: 00001025 move v0,zero
2400: 10000141 b 2908 <__dtoa+0x2908>
2404: 00000000 nop
2408: 8fc3006c lw v1,108(s8)
240c: 8fc20064 lw v0,100(s8)
2410: 00000000 nop
2414: 14620015 bne v1,v0,246c <__dtoa+0x246c>
2418: 00000000 nop
241c: 00003025 move a2,zero
2420: 2405000a li a1,10
2424: 8fc40064 lw a0,100(s8)
2428: 8f820000 lw v0,0(gp)
2428: R_MIPS_CALL16 __multadd_D2A
242c: 00000000 nop
2430: 0040c825 move t9,v0
2434: 0320f809 jalr t9
2434: R_MIPS_JALR __multadd_D2A
2438: 00000000 nop
243c: 8fdc0010 lw gp,16(s8)
2440: afc20064 sw v0,100(s8)
2444: 8fc20064 lw v0,100(s8)
2448: 00000000 nop
244c: afc2006c sw v0,108(s8)
2450: 8fc2006c lw v0,108(s8)
2454: 00000000 nop
2458: 14400026 bnez v0,24f4 <__dtoa+0x24f4>
245c: 00000000 nop
2460: 00001025 move v0,zero
2464: 10000128 b 2908 <__dtoa+0x2908>
2468: 00000000 nop
246c: 00003025 move a2,zero
2470: 2405000a li a1,10
2474: 8fc4006c lw a0,108(s8)
2478: 8f820000 lw v0,0(gp)
2478: R_MIPS_CALL16 __multadd_D2A
247c: 00000000 nop
2480: 0040c825 move t9,v0
2484: 0320f809 jalr t9
2484: R_MIPS_JALR __multadd_D2A
2488: 00000000 nop
248c: 8fdc0010 lw gp,16(s8)
2490: afc2006c sw v0,108(s8)
2494: 8fc2006c lw v0,108(s8)
2498: 00000000 nop
249c: 14400004 bnez v0,24b0 <__dtoa+0x24b0>
24a0: 00000000 nop
24a4: 00001025 move v0,zero
24a8: 10000117 b 2908 <__dtoa+0x2908>
24ac: 00000000 nop
24b0: 00003025 move a2,zero
24b4: 2405000a li a1,10
24b8: 8fc40064 lw a0,100(s8)
24bc: 8f820000 lw v0,0(gp)
24bc: R_MIPS_CALL16 __multadd_D2A
24c0: 00000000 nop
24c4: 0040c825 move t9,v0
24c8: 0320f809 jalr t9
24c8: R_MIPS_JALR __multadd_D2A
24cc: 00000000 nop
24d0: 8fdc0010 lw gp,16(s8)
24d4: afc20064 sw v0,100(s8)
24d8: 8fc20064 lw v0,100(s8)
24dc: 00000000 nop
24e0: 14400004 bnez v0,24f4 <__dtoa+0x24f4>
24e4: 00000000 nop
24e8: 00001025 move v0,zero
24ec: 10000106 b 2908 <__dtoa+0x2908>
24f0: 00000000 nop
24f4: 8fc20024 lw v0,36(s8)
24f8: 00000000 nop
24fc: 24420001 addiu v0,v0,1
2500: afc20024 sw v0,36(s8)
2504: 1000fe9f b 1f84 <__dtoa+0x1f84>
2508: 00000000 nop
250c: 24020001 li v0,1
2510: afc20024 sw v0,36(s8)
2514: 8fc50068 lw a1,104(s8)
2518: 8fc40060 lw a0,96(s8)
251c: 8f820000 lw v0,0(gp)
251c: R_MIPS_CALL16 __quorem_D2A
2520: 00000000 nop
2524: 0040c825 move t9,v0
2528: 0320f809 jalr t9
2528: R_MIPS_JALR __quorem_D2A
252c: 00000000 nop
2530: 8fdc0010 lw gp,16(s8)
2534: 24420030 addiu v0,v0,48
2538: afc20020 sw v0,32(s8)
253c: 8fc20078 lw v0,120(s8)
2540: 00000000 nop
2544: 24430001 addiu v1,v0,1
2548: afc30078 sw v1,120(s8)
254c: 8fc30020 lw v1,32(s8)
2550: 00000000 nop
2554: 00031e00 sll v1,v1,0x18
2558: 00031e03 sra v1,v1,0x18
255c: a0430000 sb v1,0(v0)
2560: 8fc20060 lw v0,96(s8)
2564: 00000000 nop
2568: 8c420014 lw v0,20(v0)
256c: 00000000 nop
2570: 14400008 bnez v0,2594 <__dtoa+0x2594>
2574: 00000000 nop
2578: 8fc20060 lw v0,96(s8)
257c: 00000000 nop
2580: 8c420010 lw v0,16(v0)
2584: 00000000 nop
2588: 28420002 slti v0,v0,2
258c: 1440008d bnez v0,27c4 <__dtoa+0x27c4>
2590: 00000000 nop
2594: 8fc30024 lw v1,36(s8)
2598: 8fc20050 lw v0,80(s8)
259c: 00000000 nop
25a0: 0062102a slt v0,v1,v0
25a4: 1040001b beqz v0,2614 <__dtoa+0x2614>
25a8: 00000000 nop
25ac: 00003025 move a2,zero
25b0: 2405000a li a1,10
25b4: 8fc40060 lw a0,96(s8)
25b8: 8f820000 lw v0,0(gp)
25b8: R_MIPS_CALL16 __multadd_D2A
25bc: 00000000 nop
25c0: 0040c825 move t9,v0
25c4: 0320f809 jalr t9
25c4: R_MIPS_JALR __multadd_D2A
25c8: 00000000 nop
25cc: 8fdc0010 lw gp,16(s8)
25d0: afc20060 sw v0,96(s8)
25d4: 8fc20060 lw v0,96(s8)
25d8: 00000000 nop
25dc: 14400004 bnez v0,25f0 <__dtoa+0x25f0>
25e0: 00000000 nop
25e4: 00001025 move v0,zero
25e8: 100000c7 b 2908 <__dtoa+0x2908>
25ec: 00000000 nop
25f0: 8fc20024 lw v0,36(s8)
25f4: 00000000 nop
25f8: 24420001 addiu v0,v0,1
25fc: afc20024 sw v0,36(s8)
2600: 1000ffc4 b 2514 <__dtoa+0x2514>
2604: 00000000 nop
2608: 00000000 nop
260c: 10000002 b 2618 <__dtoa+0x2618>
2610: 00000000 nop
2614: 00000000 nop
2618: 8fc2007c lw v0,124(s8)
261c: 00000000 nop
2620: 10400054 beqz v0,2774 <__dtoa+0x2774>
2624: 00000000 nop
2628: 24030002 li v1,2
262c: 10430022 beq v0,v1,26b8 <__dtoa+0x26b8>
2630: 00000000 nop
2634: 24050001 li a1,1
2638: 8fc40060 lw a0,96(s8)
263c: 8f820000 lw v0,0(gp)
263c: R_MIPS_CALL16 __lshift_D2A
2640: 00000000 nop
2644: 0040c825 move t9,v0
2648: 0320f809 jalr t9
2648: R_MIPS_JALR __lshift_D2A
264c: 00000000 nop
2650: 8fdc0010 lw gp,16(s8)
2654: afc20060 sw v0,96(s8)
2658: 8fc50068 lw a1,104(s8)
265c: 8fc40060 lw a0,96(s8)
2660: 8f820000 lw v0,0(gp)
2660: R_MIPS_CALL16 __cmp_D2A
2664: 00000000 nop
2668: 0040c825 move t9,v0
266c: 0320f809 jalr t9
266c: R_MIPS_JALR __cmp_D2A
2670: 00000000 nop
2674: 8fdc0010 lw gp,16(s8)
2678: afc2002c sw v0,44(s8)
267c: 8fc2002c lw v0,44(s8)
2680: 00000000 nop
2684: 1c40000f bgtz v0,26c4 <__dtoa+0x26c4>
2688: 00000000 nop
268c: 8fc2002c lw v0,44(s8)
2690: 00000000 nop
2694: 1440003a bnez v0,2780 <__dtoa+0x2780>
2698: 00000000 nop
269c: 8fc20020 lw v0,32(s8)
26a0: 00000000 nop
26a4: 30420001 andi v0,v0,0x1
26a8: 10400035 beqz v0,2780 <__dtoa+0x2780>
26ac: 00000000 nop
26b0: 10000004 b 26c4 <__dtoa+0x26c4>
26b4: 00000000 nop
26b8: 00000000 nop
26bc: 10000015 b 2714 <__dtoa+0x2714>
26c0: 00000000 nop
26c4: 00000000 nop
26c8: 10000012 b 2714 <__dtoa+0x2714>
26cc: 00000000 nop
26d0: 8fc30078 lw v1,120(s8)
26d4: 8fc20084 lw v0,132(s8)
26d8: 00000000 nop
26dc: 1462000d bne v1,v0,2714 <__dtoa+0x2714>
26e0: 00000000 nop
26e4: 8fc20030 lw v0,48(s8)
26e8: 00000000 nop
26ec: 24420001 addiu v0,v0,1
26f0: afc20030 sw v0,48(s8)
26f4: 8fc20078 lw v0,120(s8)
26f8: 00000000 nop
26fc: 24430001 addiu v1,v0,1
2700: afc30078 sw v1,120(s8)
2704: 24030031 li v1,49
2708: a0430000 sb v1,0(v0)
270c: 1000002e b 27c8 <__dtoa+0x27c8>
2710: 00000000 nop
2714: 8fc20078 lw v0,120(s8)
2718: 00000000 nop
271c: 2442ffff addiu v0,v0,-1
2720: afc20078 sw v0,120(s8)
2724: 8fc20078 lw v0,120(s8)
2728: 00000000 nop
272c: 80430000 lb v1,0(v0)
2730: 24020039 li v0,57
2734: 1062ffe6 beq v1,v0,26d0 <__dtoa+0x26d0>
2738: 00000000 nop
273c: 8fc20078 lw v0,120(s8)
2740: 00000000 nop
2744: 24430001 addiu v1,v0,1
2748: afc30078 sw v1,120(s8)
274c: 80430000 lb v1,0(v0)
2750: 00000000 nop
2754: 306300ff andi v1,v1,0xff
2758: 24630001 addiu v1,v1,1
275c: 306300ff andi v1,v1,0xff
2760: 00031e00 sll v1,v1,0x18
2764: 00031e03 sra v1,v1,0x18
2768: a0430000 sb v1,0(v0)
276c: 10000016 b 27c8 <__dtoa+0x27c8>
2770: 00000000 nop
2774: 00000000 nop
2778: 10000002 b 2784 <__dtoa+0x2784>
277c: 00000000 nop
2780: 00000000 nop
2784: 8fc20078 lw v0,120(s8)
2788: 00000000 nop
278c: 2442ffff addiu v0,v0,-1
2790: afc20078 sw v0,120(s8)
2794: 8fc20078 lw v0,120(s8)
2798: 00000000 nop
279c: 80430000 lb v1,0(v0)
27a0: 24020030 li v0,48
27a4: 1062fff7 beq v1,v0,2784 <__dtoa+0x2784>
27a8: 00000000 nop
27ac: 8fc20078 lw v0,120(s8)
27b0: 00000000 nop
27b4: 24420001 addiu v0,v0,1
27b8: afc20078 sw v0,120(s8)
27bc: 10000002 b 27c8 <__dtoa+0x27c8>
27c0: 00000000 nop
27c4: 00000000 nop
27c8: 8fc40068 lw a0,104(s8)
27cc: 8f820000 lw v0,0(gp)
27cc: R_MIPS_CALL16 __Bfree_D2A
27d0: 00000000 nop
27d4: 0040c825 move t9,v0
27d8: 0320f809 jalr t9
27d8: R_MIPS_JALR __Bfree_D2A
27dc: 00000000 nop
27e0: 8fdc0010 lw gp,16(s8)
27e4: 8fc20064 lw v0,100(s8)
27e8: 00000000 nop
27ec: 10400020 beqz v0,2870 <__dtoa+0x2870>
27f0: 00000000 nop
27f4: 8fc2006c lw v0,108(s8)
27f8: 00000000 nop
27fc: 1040000d beqz v0,2834 <__dtoa+0x2834>
2800: 00000000 nop
2804: 8fc3006c lw v1,108(s8)
2808: 8fc20064 lw v0,100(s8)
280c: 00000000 nop
2810: 10620008 beq v1,v0,2834 <__dtoa+0x2834>
2814: 00000000 nop
2818: 8fc4006c lw a0,108(s8)
281c: 8f820000 lw v0,0(gp)
281c: R_MIPS_CALL16 __Bfree_D2A
2820: 00000000 nop
2824: 0040c825 move t9,v0
2828: 0320f809 jalr t9
2828: R_MIPS_JALR __Bfree_D2A
282c: 00000000 nop
2830: 8fdc0010 lw gp,16(s8)
2834: 8fc40064 lw a0,100(s8)
2838: 8f820000 lw v0,0(gp)
2838: R_MIPS_CALL16 __Bfree_D2A
283c: 00000000 nop
2840: 0040c825 move t9,v0
2844: 0320f809 jalr t9
2844: R_MIPS_JALR __Bfree_D2A
2848: 00000000 nop
284c: 8fdc0010 lw gp,16(s8)
2850: 10000008 b 2874 <__dtoa+0x2874>
2854: 00000000 nop
2858: 00000000 nop
285c: 10000005 b 2874 <__dtoa+0x2874>
2860: 00000000 nop
2864: 00000000 nop
2868: 10000002 b 2874 <__dtoa+0x2874>
286c: 00000000 nop
2870: 00000000 nop
2874: 8fc40060 lw a0,96(s8)
2878: 8f820000 lw v0,0(gp)
2878: R_MIPS_CALL16 __Bfree_D2A
287c: 00000000 nop
2880: 0040c825 move t9,v0
2884: 0320f809 jalr t9
2884: R_MIPS_JALR __Bfree_D2A
2888: 00000000 nop
288c: 8fdc0010 lw gp,16(s8)
2890: 8fc30078 lw v1,120(s8)
2894: 8fc20084 lw v0,132(s8)
2898: 00000000 nop
289c: 14620008 bne v1,v0,28c0 <__dtoa+0x28c0>
28a0: 00000000 nop
28a4: 8fc20078 lw v0,120(s8)
28a8: 00000000 nop
28ac: 24430001 addiu v1,v0,1
28b0: afc30078 sw v1,120(s8)
28b4: 24030030 li v1,48
28b8: a0430000 sb v1,0(v0)
28bc: afc00030 sw zero,48(s8)
28c0: 8fc20078 lw v0,120(s8)
28c4: 00000000 nop
28c8: a0400000 sb zero,0(v0)
28cc: 8fc20030 lw v0,48(s8)
28d0: 00000000 nop
28d4: 24430001 addiu v1,v0,1
28d8: 8fc200e0 lw v0,224(s8)
28dc: 00000000 nop
28e0: ac430000 sw v1,0(v0)
28e4: 8fc200e8 lw v0,232(s8)
28e8: 00000000 nop
28ec: 10400005 beqz v0,2904 <__dtoa+0x2904>
28f0: 00000000 nop
28f4: 8fc200e8 lw v0,232(s8)
28f8: 8fc30078 lw v1,120(s8)
28fc: 00000000 nop
2900: ac430000 sw v1,0(v0)
2904: 8fc20084 lw v0,132(s8)
2908: 03c0e825 move sp,s8
290c: 8fbf00cc lw ra,204(sp)
2910: 8fbe00c8 lw s8,200(sp)
2914: 8fb100c4 lw s1,196(sp)
2918: 8fb000c0 lw s0,192(sp)
291c: 27bd00d0 addiu sp,sp,208
2920: 03e00008 jr ra
2924: 00000000 nop
...
---
> Does the problem manifest if you statically link libc too?
---
mirage-% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/nbmake-newsmips libc.a
:
[link the built libc.a on NWS-3470 via NFS]
news3470-% cc -static test.c /s/netbsd-9/src/lib/libc/obj.newsmips/libc.a
news3470-% ./a.out
300.0
314
?00.0
1570
news3470-%
---
---
mirage-% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/nbmake-newsmips CFLAGS+=-DTrust_FLT_ROUNDS -j4 libc.a
:
[link the built libc.a with Trust_FLT_ROUNDS on NWS-3470 via NFS]
news3470-% cc -static test.c /s/netbsd-9/src/lib/libc/obj.newsmips/libc.a
news3470-% ./a.out
314.2
314
1570.8
1570
news3470-%
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: gnats-bugs@netbsd.org
Cc: rvp@SDF.ORG, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Tue, 7 Nov 2023 22:35:19 +0900
> So, maybe a ".set push; ...; .set pop" is needed for older MIPS? Can you
> change __rfs() like that?
I tried it, but adding .set directives into __rts() didn't solve
the problem (no asm change).
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: gnats-bugs@netbsd.org
Cc: rvp@SDF.ORG, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Tue, 7 Nov 2023 22:54:06 +0900
> Looking at the dump, I see that in the inline case, we have:
>
> .type __dtoa, @function
> __dtoa:
> [...]
> .set reorder
> [...]
> cfc1 $2,$31
> andi $2,$2,0x3
> [...]
>
> while in the non-inline case, it is:
>
> .type __dtoa, @function
> __dtoa:
> [...]
> .set noreorder
> [...]
> .reloc 1f,R_MIPS_JALR,__libc_fegetround_ref
> 1: jalr $25
> [...]
>
> which would mean that here the fegetround() (which does its own
> `.set noreorder') -> __rfs() instructions are all strictly ordered.
> Whereas in the present (inlined) case, all those instructions may be
> ordered differently.
Per my understanding:
- .reorder tells as(1) to reorder instructions for branch delay slot,
and put necessary nop instructions to avoid instruction delay hazards
- .noreorder tells as(1) assemble instructions as is (i.e. programmers
have the responsivility of branch delay slots and delay hazards)
R3000 (MIPS1) CPUs requires proper nops to avoid delay hazards.
R4x00 (MIPS3 and later) CPUS handle such hazards by hardware.
There were many hazard bugs that only affects MIPS1:
https://github.com/NetBSD/src/commit/908b1c665b560052b06b4d21f69fbbceb4092dc7
https://github.com/NetBSD/src/commit/b23f3dbe357baf334f01e266af68692bf25626ac
https://github.com/NetBSD/src/commit/a75c7827423046c581d7fa1183c8d13788769ddd
https://github.com/NetBSD/src/commit/7e1a38b9b3ea99b4845d8a315c742d8b27640d29
and this dtoa() behavior looks similar issue, but I don't have a clue
if gcc (or our some asm sources) has a bug that triggers unexpected
hazards in .set noreorder cases..
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong resultsonR3000mipseb
Date: Tue, 7 Nov 2023 23:11:47 +0900
> mirage-% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-10.0_BETA-i386/bin/mipseb--netbsd-objdump -dr obj.newsmips/dtoa.pico
Ah, bad pasto..
obj.newsmips/dtoa.pico: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <__dtoa>:
0: 3c1c0000 lui gp,0x0
0: R_MIPS_HI16 _gp_disp
4: 279c0000 addiu gp,gp,0
4: R_MIPS_LO16 _gp_disp
8: 0399e021 addu gp,gp,t9
c: 27bdff88 addiu sp,sp,-120
10: afbc0010 sw gp,16(sp)
14: afb20058 sw s2,88(sp)
18: afbf0074 sw ra,116(sp)
1c: afbe0070 sw s8,112(sp)
20: afb7006c sw s7,108(sp)
24: afb60068 sw s6,104(sp)
28: afb50064 sw s5,100(sp)
2c: afb40060 sw s4,96(sp)
30: afb3005c sw s3,92(sp)
34: afb10054 sw s1,84(sp)
38: afb00050 sw s0,80(sp)
3c: e7ac007c swc1 $f12,124(sp)
40: e7ad0078 swc1 $f13,120(sp)
44: 00c09025 move s2,a2
48: afa70084 sw a3,132(sp)
4c: 8fa3008c lw v1,140(sp)
50: 4442f800 cfc1 v0,$31
54: 00000000 nop
58: 30420003 andi v0,v0,0x3
5c: 2442ffff addiu v0,v0,-1
60: 2c440003 sltiu a0,v0,3
64: 108000cb beqz a0,394 <__dtoa+0x394>
68: 24140001 li s4,1
6c: 8f840000 lw a0,0(gp)
6c: R_MIPS_GOT16 .rodata
70: 00021080 sll v0,v0,0x2
74: 24840000 addiu a0,a0,0
74: R_MIPS_LO16 .rodata
78: 00441021 addu v0,v0,a0
7c: 8fa5007c lw a1,124(sp)
80: 8fa40078 lw a0,120(sp)
84: 8fb00078 lw s0,120(sp)
88: 8c540000 lw s4,0(v0)
8c: afa50024 sw a1,36(sp)
90: 060000c6 bltz s0,3ac <__dtoa+0x3ac>
94: afa40020 sw a0,32(sp)
98: 3c027ff0 lui v0,0x7ff0
9c: 02022024 and a0,s0,v0
a0: 108200cb beq a0,v0,3d0 <__dtoa+0x3d0>
a4: ac600000 sw zero,0(v1)
a8: c7a00024 lwc1 $f0,36(sp)
ac: c7a10020 lwc1 $f1,32(sp)
b0: e7a0002c swc1 $f0,44(sp)
b4: e7a10028 swc1 $f1,40(sp)
b8: c7a2002c lwc1 $f2,44(sp)
bc: 44800000 mtc1 zero,$f0
c0: c7a30028 lwc1 $f3,40(sp)
c4: 44800800 mtc1 zero,$f1
c8: 00000000 nop
cc: 46201032 c.eq.d $f2,$f0
d0: 00000000 nop
d4: 45010120 bc1t 558 <__dtoa+0x558>
d8: 2a820002 slti v0,s4,2
dc: 14400008 bnez v0,100 <__dtoa+0x100>
e0: 00000000 nop
e4: 8c620000 lw v0,0(v1)
e8: 00000000 nop
ec: 10400125 beqz v0,584 <__dtoa+0x584>
f0: 24020002 li v0,2
f4: 12820002 beq s4,v0,100 <__dtoa+0x100>
f8: 0000a025 move s4,zero
fc: 24140002 li s4,2
100: c7ac002c lwc1 $f12,44(sp)
104: 8f990000 lw t9,0(gp)
104: R_MIPS_CALL16 __d2b_D2A
108: c7ad0028 lwc1 $f13,40(sp)
10c: 27a7001c addiu a3,sp,28
110: 0320f809 jalr t9
110: R_MIPS_JALR __d2b_D2A
114: 27a60018 addiu a2,sp,24
118: 8fbc0010 lw gp,16(sp)
11c: 10400146 beqz v0,638 <__dtoa+0x638>
120: 0040f025 move s8,v0
124: 00102502 srl a0,s0,0x14
128: 8fb6001c lw s6,28(sp)
12c: 108000ea beqz a0,4d8 <__dtoa+0x4d8>
130: 3c06000f lui a2,0xf
134: 8fa50028 lw a1,40(sp)
138: 34c6ffff ori a2,a2,0xffff
13c: 00a62824 and a1,a1,a2
140: 8fa3002c lw v1,44(sp)
144: 3c063ff0 lui a2,0x3ff0
148: 00a61025 or v0,a1,a2
14c: 2484fc01 addiu a0,a0,-1023
150: afa00030 sw zero,48(sp)
154: 8f850000 lw a1,0(gp)
154: R_MIPS_GOT16 $LC4
158: 44831000 mtc1 v1,$f2
15c: c4a00004 lwc1 $f0,4(a1)
15c: R_MIPS_LO16 $LC4
160: 44821800 mtc1 v0,$f3
164: c4a10000 lwc1 $f1,0(a1)
164: R_MIPS_LO16 $LC4
168: 8f820000 lw v0,0(gp)
168: R_MIPS_GOT16 $LC5
16c: 46201001 sub.d $f0,$f2,$f0
170: c4420004 lwc1 $f2,4(v0)
170: R_MIPS_LO16 $LC5
174: c4430000 lwc1 $f3,0(v0)
174: R_MIPS_LO16 $LC5
178: 8f820000 lw v0,0(gp)
178: R_MIPS_GOT16 $LC7
17c: 46220002 mul.d $f0,$f0,$f2
180: c4440004 lwc1 $f4,4(v0)
180: R_MIPS_LO16 $LC7
184: 44841000 mtc1 a0,$f2
188: c4450000 lwc1 $f5,0(v0)
188: R_MIPS_LO16 $LC7
18c: 8f820000 lw v0,0(gp)
18c: R_MIPS_GOT16 $LC6
190: 468010a1 cvt.d.w $f2,$f2
194: 46241082 mul.d $f2,$f2,$f4
198: c4440004 lwc1 $f4,4(v0)
198: R_MIPS_LO16 $LC6
19c: c4450000 lwc1 $f5,0(v0)
19c: R_MIPS_LO16 $LC6
1a0: 46240000 add.d $f0,$f0,$f4
1a4: 46220000 add.d $f0,$f0,$f2
1a8: 44801000 mtc1 zero,$f2
1ac: 44801800 mtc1 zero,$f3
1b0: 00000000 nop
1b4: 4622003c c.lt.d $f0,$f2
1b8: 4442f800 cfc1 v0,$31
1bc: 4442f800 cfc1 v0,$31
1c0: 00000000 nop
1c4: 34410003 ori at,v0,0x3
1c8: 38210002 xori at,at,0x2
1cc: 44c1f800 ctc1 at,$31
1d0: 00000000 nop
1d4: 462000a4 cvt.w.d $f2,$f0
1d8: 44c2f800 ctc1 v0,$31
1dc: 00000000 nop
1e0: 44101000 mfc1 s0,$f2
1e4: 45010116 bc1t 640 <__dtoa+0x640>
1e8: 00000000 nop
1ec: 2e020017 sltiu v0,s0,23
1f0: 10400095 beqz v0,448 <__dtoa+0x448>
1f4: 24020001 li v0,1
1f8: 8f820000 lw v0,0(gp)
1f8: R_MIPS_GOT16 __tens_D2A
1fc: 001018c0 sll v1,s0,0x3
200: 00431021 addu v0,v0,v1
204: c4400004 lwc1 $f0,4(v0)
208: c7a20024 lwc1 $f2,36(sp)
20c: c4410000 lwc1 $f1,0(v0)
210: c7a30020 lwc1 $f3,32(sp)
214: 4620103c c.lt.d $f2,$f0
218: 00000000 nop
21c: 450000e6 bc1f 5b8 <__dtoa+0x5b8>
220: 00000000 nop
224: 02c4b023 subu s6,s6,a0
228: 26d3ffff addiu s3,s6,-1
22c: 2610ffff addiu s0,s0,-1
230: 0661008a bgez s3,45c <__dtoa+0x45c>
234: afa0003c sw zero,60(sp)
238: 24020001 li v0,1
23c: 0056b023 subu s6,v0,s6
240: 06010088 bgez s0,464 <__dtoa+0x464>
244: 00009825 move s3,zero
248: 2e42000a sltiu v0,s2,10
24c: 02d0b023 subu s6,s6,s0
250: 0010a823 negu s5,s0
254: 14400088 bnez v0,478 <__dtoa+0x478>
258: afa00038 sw zero,56(sp)
25c: 00009025 move s2,zero
260: 8f990000 lw t9,0(gp)
260: R_MIPS_CALL16 __rv_alloc_D2A
264: 00000000 nop
268: 0320f809 jalr t9
268: R_MIPS_JALR __rv_alloc_D2A
26c: 24040012 li a0,18
270: 8fbc0010 lw gp,16(sp)
274: 104000f0 beqz v0,638 <__dtoa+0x638>
278: 00408825 move s1,v0
27c: 8fa20018 lw v0,24(sp)
280: 00000000 nop
284: 044001a8 bltz v0,928 <__dtoa+0x928>
288: 2a03000f slti v1,s0,15
28c: 106001a7 beqz v1,92c <__dtoa+0x92c>
290: 2403ffff li v1,-1
294: 8f820000 lw v0,0(gp)
294: R_MIPS_GOT16 __tens_D2A
298: 001018c0 sll v1,s0,0x3
29c: 00431021 addu v0,v0,v1
2a0: c4440004 lwc1 $f4,4(v0)
2a4: c4450000 lwc1 $f5,0(v0)
2a8: 2402ffff li v0,-1
2ac: afa20028 sw v0,40(sp)
2b0: 8f820000 lw v0,0(gp)
2b0: R_MIPS_GOT16 $LC9
2b4: 44803000 mtc1 zero,$f6
2b8: c4480004 lwc1 $f8,4(v0)
2b8: R_MIPS_LO16 $LC9
2bc: c7a00024 lwc1 $f0,36(sp)
2c0: c4490000 lwc1 $f9,0(v0)
2c0: R_MIPS_LO16 $LC9
2c4: 8fa20028 lw v0,40(sp)
2c8: 44803800 mtc1 zero,$f7
2cc: c7a10020 lwc1 $f1,32(sp)
2d0: 26250001 addiu a1,s1,1
2d4: 10000004 b 2e8 <__dtoa+0x2e8>
2d8: 02229821 addu s3,s1,v0
2dc: 127703bd beq s3,s7,11d4 <__dtoa+0x11d4>
2e0: 24a50001 addiu a1,a1,1
2e4: 46280002 mul.d $f0,$f0,$f8
2e8: 46240083 div.d $f2,$f0,$f4
2ec: 4442f800 cfc1 v0,$31
2f0: 4442f800 cfc1 v0,$31
2f4: 00000000 nop
2f8: 34410003 ori at,v0,0x3
2fc: 38210002 xori at,at,0x2
300: 44c1f800 ctc1 at,$31
304: 00000000 nop
308: 462010a4 cvt.w.d $f2,$f2
30c: 44c2f800 ctc1 v0,$31
310: 00000000 nop
314: 44041000 mfc1 a0,$f2
318: 468010a1 cvt.d.w $f2,$f2
31c: 46241082 mul.d $f2,$f2,$f4
320: 46220001 sub.d $f0,$f0,$f2
324: 4626003c c.lt.d $f0,$f6
> 328: 00000000 nop
> 32c: 45000003 bc1f 33c <__dtoa+0x33c>
> 330: 00a0b825 move s7,a1
> 334: 46240000 add.d $f0,$f0,$f4
> 338: 2484ffff addiu a0,a0,-1
> 33c: 24820030 addiu v0,a0,48
:
---
Izumi Tsutsui
From: Simon Burge <simonb@NetBSD.org>
To: gnats-bugs@netbsd.org
Cc: port-mips-maintainer@netbsd.org, gnats-admin@netbsd.org,
netbsd-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Wed, 08 Nov 2023 02:24:49 +1100
Hi Tsutsui,
Izumi Tsutsui wrote:
> Per my understanding:
> - .reorder tells as(1) to reorder instructions for branch delay slot,
> and put necessary nop instructions to avoid instruction delay hazards
> - .noreorder tells as(1) assemble instructions as is (i.e. programmers
> have the responsivility of branch delay slots and delay hazards)
This is correct.
> R3000 (MIPS1) CPUs requires proper nops to avoid delay hazards.
> R4x00 (MIPS3 and later) CPUS handle such hazards by hardware.
> =
> There were many hazard bugs that only affects MIPS1:
> https://github.com/NetBSD/src/commit/908b1c665b560052b06b4d21f69fbbceb=
4092dc7 =
> https://github.com/NetBSD/src/commit/b23f3dbe357baf334f01e266af68692bf=
25626ac
> https://github.com/NetBSD/src/commit/a75c7827423046c581d7fa1183c8d1378=
8769ddd
> https://github.com/NetBSD/src/commit/7e1a38b9b3ea99b4845d8a315c742d8b2=
7640d29
Can you please try this experiment to hopefully rule in/out simple CP1 haz=
ards?
In sys/arch/mips/include/fenv.h change __rfs() to add two nops before usin=
g
the result:
__asm __volatile(
".set push\n"
".set noreorder\n"
"cfc1 %0,$31\n"
"nop\n"
"nop\n"
".set pop" : "=3Dr" (__fpsr));
In lib/libc/arch/mips/gen/flt_rounds.c change __flt_rounds() in a similar =
way:
__asm __volatile(
".set push\n"
".set noreorder\n"
"cfc1 %0,$31\n"
"nop\n"
"nop\n"
".set pop" : "=3Dr" (x));
I have no idea why a number of the __asm()s for "cfc1" have ".set noat";
nothing should be using the AT register here, so that doesn't make sense
to me. Let's ignore that for now though.
Unfortunately I can't find a R3000 box here that powers on anymore so I
can't test this locally. :(
If this helps, we might need to add CP1 hazards in lots more places.
But then I don't understand why this used to work ... unless
> and this dtoa() behavior looks similar issue, but I don't have a clue
> if gcc (or our some asm sources) has a bug that triggers unexpected
> hazards in .set noreorder cases..
This would seem like either a big regression or a distinct change of
optimiser behaviour in newer gcc? I haven't checked if glibc has any
fancy handling for CP1 hazards.
Cheers,
Simon.
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: simonb@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Tue, 14 Nov 2023 01:31:10 +0900
simonb@ wrote:
> Can you please try this experiment to hopefully rule in/out simple CP1 hazards?
>
> In sys/arch/mips/include/fenv.h change __rfs() to add two nops before using
> the result:
>
> __asm __volatile(
> ".set push\n"
> ".set noreorder\n"
> "cfc1 %0,$31\n"
> "nop\n"
> "nop\n"
> ".set pop" : "=r" (__fpsr));
It looks this doesn't help.
With the original libc:
---
news3470-% objdump -drz /s/netbsd-9/src/lib/libc/obj.newsmips/dtoa.pico | head -40
/s/netbsd-9/src/lib/libc/obj.newsmips/dtoa.pico: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <__dtoa>:
0: 3c1c0000 lui gp,0x0
0: R_MIPS_HI16 _gp_disp
4: 279c0000 addiu gp,gp,0
4: R_MIPS_LO16 _gp_disp
8: 0399e021 addu gp,gp,t9
c: 27bdff88 addiu sp,sp,-120
10: afbc0010 sw gp,16(sp)
14: afb20058 sw s2,88(sp)
18: afbf0074 sw ra,116(sp)
1c: afbe0070 sw s8,112(sp)
20: afb7006c sw s7,108(sp)
24: afb60068 sw s6,104(sp)
28: afb50064 sw s5,100(sp)
2c: afb40060 sw s4,96(sp)
30: afb3005c sw s3,92(sp)
34: afb10054 sw s1,84(sp)
38: afb00050 sw s0,80(sp)
3c: e7ac007c swc1 $f12,124(sp)
40: e7ad0078 swc1 $f13,120(sp)
44: 00c09025 move s2,a2
48: afa70084 sw a3,132(sp)
4c: 8fa3008c lw v1,140(sp)
50: 4442f800 cfc1 v0,$31
54: 00000000 nop
58: 30420003 andi v0,v0,0x3
5c: 2442ffff addiu v0,v0,-1
60: 2c440003 sltiu a0,v0,3
64: 108000cb beqz a0,394 <__dtoa+0x394>
68: 24140001 li s4,1
6c: 8f840000 lw a0,0(gp)
6c: R_MIPS_GOT16 .rodata
70: 00021080 sll v0,v0,0x2
74: 24840000 addiu a0,a0,0
news3470-% env LD_LIBRARY_PATH=/s/netbsd-9/src/lib/libc/obj.newsmips ldd ./a.out
./a.out:
-lc.12 => /s/netbsd-9/src/lib/libc/obj.newsmips/libc.so.12
news3470-% env LD_LIBRARY_PATH=/s/netbsd-9/src/lib/libc/obj.newsmips ./a.out
300.0
314
?00.0
1570
news3470-%
---
With your patch:
---
news3470-% objdump -drz /s/netbsd-9/src/lib/libc/obj.newsmips/dtoa.pico | head -40
/s/netbsd-9/src/lib/libc/obj.newsmips/dtoa.pico: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <__dtoa>:
0: 3c1c0000 lui gp,0x0
0: R_MIPS_HI16 _gp_disp
4: 279c0000 addiu gp,gp,0
4: R_MIPS_LO16 _gp_disp
8: 0399e021 addu gp,gp,t9
c: 27bdff88 addiu sp,sp,-120
10: afbc0010 sw gp,16(sp)
14: afb20058 sw s2,88(sp)
18: afbf0074 sw ra,116(sp)
1c: afbe0070 sw s8,112(sp)
20: afb7006c sw s7,108(sp)
24: afb60068 sw s6,104(sp)
28: afb50064 sw s5,100(sp)
2c: afb40060 sw s4,96(sp)
30: afb3005c sw s3,92(sp)
34: afb10054 sw s1,84(sp)
38: afb00050 sw s0,80(sp)
3c: e7ac007c swc1 $f12,124(sp)
40: e7ad0078 swc1 $f13,120(sp)
44: 00c09025 move s2,a2
48: afa70084 sw a3,132(sp)
4c: 8fa3008c lw v1,140(sp)
50: 4442f800 cfc1 v0,$31
54: 00000000 nop
58: 00000000 nop
5c: 30420003 andi v0,v0,0x3
60: 2442ffff addiu v0,v0,-1
64: 2c440003 sltiu a0,v0,3
68: 108000cb beqz a0,398 <__dtoa+0x398>
6c: 24140001 li s4,1
70: 8f840000 lw a0,0(gp)
70: R_MIPS_GOT16 .rodata
74: 00021080 sll v0,v0,0x2
news3470-% env LD_LIBRARY_PATH=/s/netbsd-9/src/lib/libc/obj.newsmips ./a.out
300.0
314
?00.0
1570
news3470-%
---
I'm trying to check which gcc -ffoo option causes the wrong behaviour,
but it's a bit hard to analyze..
At least changing ${DESTDIR}/usr/include/mips/fenv.h from
>> static inline fpu_control_t
>> __rfs(void)
to
>> static __noinline fpu_control_t
>> __rfs(void)
also solves the problem, but asm outputs are completely different
in these two cases.
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: simonb@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Tue, 14 Nov 2023 02:20:50 +0900
I wrote:
> At least changing ${DESTDIR}/usr/include/mips/fenv.h from
> >> static inline fpu_control_t
> >> __rfs(void)
> to
> >> static __noinline fpu_control_t
> >> __rfs(void)
> also solves the problem, but asm outputs are completely different
> in these two cases.
It looks gcc (7.5.0 from NetBSD 9.3) -O2 drops some nops
if __rfs() is defined as inline:
--- dtoa.s-inline-rts 2023-11-14 01:37:09.566670724 +0900
+++ dtoa.s-noinline-rts 2023-11-14 01:36:56.834009058 +0900
: c7a00024 lwc1 $f0,36(sp)
+ : 00000000 nop
: c7a10020 lwc1 $f1,32(sp)
+ : 00000000 nop
: e7a0002c swc1 $f0,44(sp)
: e7a10028 swc1 $f1,40(sp)
[...]
: 8f820000 lw v0,0(gp)
: 46201001 sub.d $f0,$f2,$f0
: c4420004 lwc1 $f2,4(v0)
+ : 00000000 nop
: c4430000 lwc1 $f3,0(v0)
: 8f820000 lw v0,0(gp)
: 46220002 mul.d $f0,$f0,$f2
[...]
: 468010a1 cvt.d.w $f2,$f2
: 46241082 mul.d $f2,$f2,$f4
: c4440004 lwc1 $f4,4(v0)
+ : 00000000 nop
: c4450000 lwc1 $f5,0(v0)
+ : 00000000 nop
: 46240000 add.d $f0,$f0,$f4
: 46220000 add.d $f0,$f0,$f2
: 44801000 mtc1 zero,$f2
+ : 00000000 nop
: 44801800 mtc1 zero,$f3
: 00000000 nop
: 4622003c c.lt.d $f0,$f2
[...]
: c7a20024 lwc1 $f2,36(sp)
: c4410000 lwc1 $f1,0(v0)
: c7a30020 lwc1 $f3,32(sp)
+ : 00000000 nop
: 4620103c c.lt.d $f2,$f0
: 00000000 nop
[...]
: 001018c0 sll v1,s0,0x3
: 00431021 addu v0,v0,v1
: c4440004 lwc1 $f4,4(v0)
+ : 00000000 nop
: c4450000 lwc1 $f5,0(v0)
: 2402ffff li v0,-1
: afa20028 sw v0,40(sp)
[...]
: c4410000 lwc1 $f1,0(v0)
+ : 00000000 nop
: 46201000 add.d $f0,$f2,$f0
: 44090000 mfc1 t1,$f0
: 44080800 mfc1 t0,$f1
[...]
: 8f820000 lw v0,0(gp)
: 00000000 nop
: c4420004 lwc1 $f2,4(v0)
+ : 00000000 nop
: c4430000 lwc1 $f3,0(v0)
+ : 00000000 nop
: 4622003c c.lt.d $f0,$f2
: 00000000 nop
- : 45010345 bc1t 1498 <__dtoa+0x1498>
+ : 4501035d bc1t 153c <__dtoa+0x1530>
: 00000000 nop
: 44881000 mtc1 t0,$f2
: 8f820000 lw v0,0(gp)
: 468010a1 cvt.d.w $f2,$f2
: 46201082 mul.d $f2,$f2,$f0
: c4440004 lwc1 $f4,4(v0)
+ : 00000000 nop
: c4450000 lwc1 $f5,0(v0)
+ : 00000000 nop
: 46241080 add.d $f2,$f2,$f4
: 44031000 mfc1 v1,$f2
: 44021800 mfc1 v0,$f3
[...]
: 8f8a0000 lw t2,0(gp)
: 00000000 nop
: c5420004 lwc1 $f2,4(t2)
+ : 00000000 nop
: c5430000 lwc1 $f3,0(t2)
+ : 00000000 nop
: 46241083 div.d $f2,$f2,$f4
: 46281081 sub.d $f2,$f2,$f8
: 4622003c c.lt.d $f0,$f2
: 00000000 nop
- : 45010030 bc1t 920 <__dtoa+0x920>
+ : 45010033 bc1t 980 <__dtoa+0x974>
: a2220000 sb v0,0(s1)
: 8f840000 lw a0,0(gp)
: 00000000 nop
: c4880004 lwc1 $f8,4(a0)
+ : 00000000 nop
: c4890000 lwc1 $f9,0(a0)
+ : 00000000 nop
: 46204101 sub.d $f4,$f8,$f0
: 4622203c c.lt.d $f4,$f2
: 00000000 nop
- : 45010366 bc1t 161c <__dtoa+0x161c>
+ : 45010378 bc1t 16c0 <__dtoa+0x16b4>
: 00000000 nop
: 24020001 li v0,1
- : 11220141 beq t1,v0,d94 <__dtoa+0xd94>
+ : 11220147 beq t1,v0,e08 <__dtoa+0xdfc>
: 02294821 addu t1,s1,t1
: 8f850000 lw a1,0(gp)
: 00000000 nop
: c4a40004 lwc1 $f4,4(a1)
+ : 00000000 nop
: c4a50000 lwc1 $f5,0(a1)
- : 10000009 b 8cc <__dtoa+0x8cc>
+ : 10000009 b 92c <__dtoa+0x920>
: 46240002 mul.d $f0,$f0,$f4
: 46204181 sub.d $f6,$f8,$f0
: 4622303c c.lt.d $f6,$f2
: 00000000 nop
[...]
: 46201082 mul.d $f2,$f2,$f0
: c4440004 lwc1 $f4,4(v0)
+ : 00000000 nop
: c4450000 lwc1 $f5,0(v0)
+ : 00000000 nop
: 46241080 add.d $f2,$f2,$f4
: 44031000 mfc1 v1,$f2
: 44021800 mfc1 v0,$f3
[...]
: 8f820000 lw v0,0(gp)
: 00000000 nop
: c4420004 lwc1 $f2,4(v0)
+ : 00000000 nop
: c4430000 lwc1 $f3,0(v0)
+ : 00000000 nop
: 46220001 sub.d $f0,$f0,$f2
: 44851000 mtc1 a1,$f2
+ : 00000000 nop
: 44841800 mtc1 a0,$f3
: 00000000 nop
: 4620103c c.lt.d $f2,$f0
: 00000000 nop
[...]
: 8f820000 lw v0,0(gp)
: 00000000 nop
: 00431021 addu v0,v0,v1
: c4440004 lwc1 $f4,4(v0)
+ : 00000000 nop
: c4450000 lwc1 $f5,0(v0)
: 8fa20084 lw v0,132(sp)
: 00000000 nop
- : 0441fd39 bgez v0,2b0 <__dtoa+0x2b0>
+ : 0441fd28 bgez v0,2e4 <__dtoa+0x2d8>
: 00000000 nop
: 8fa20028 lw v0,40(sp)
: 00000000 nop
- : 1c40fd35 bgtz v0,2b0 <__dtoa+0x2b0>
+ : 1c40fd24 bgtz v0,2e4 <__dtoa+0x2d8>
: 00000000 nop
- : 1440000c bnez v0,e14 <__dtoa+0xe14>
+ : 14400010 bnez v0,e9c <__dtoa+0xe90>
: 00000000 nop
: 8f820000 lw v0,0(gp)
: 00000000 nop
: c4400004 lwc1 $f0,4(v0)
+ : 00000000 nop
: c4410000 lwc1 $f1,0(v0)
+ : 00000000 nop
: 46202102 mul.d $f4,$f4,$f0
: c7a00024 lwc1 $f0,36(sp)
+ : 00000000 nop
: c7a10020 lwc1 $f1,32(sp)
+ : 00000000 nop
: 4624003e c.le.d $f0,$f4
: 00000000 nop
- : 45000153 bc1f 135c <__dtoa+0x135c>
+ : 45000154 bc1f 13e8 <__dtoa+0x13dc>
: 0000a825 move s5,zero
: 8f990000 lw t9,0(gp)
: 00000000 nop
[...]
: 8f850000 lw a1,0(gp)
: 00000000 nop
: c4a80004 lwc1 $f8,4(a1)
+ : 00000000 nop
: c4a90000 lwc1 $f9,0(a1)
+ : 00000000 nop
: 46280002 mul.d $f0,$f0,$f8
: 26e50001 addiu a1,s7,1
: 4442f800 cfc1 v0,$31
[...]
: 8f820000 lw v0,0(gp)
: 00000000 nop
: c4440004 lwc1 $f4,4(v0)
+ : 00000000 nop
: c4450000 lwc1 $f5,0(v0)
+ : 00000000 nop
: 46241180 add.d $f6,$f2,$f4
: 4620303c c.lt.d $f6,$f0
: 00000000 nop
- : 45000052 bc1f 15a8 <__dtoa+0x15a8>
+ : 45000053 bc1f 164c <__dtoa+0x1640>
: 00a0b825 move s7,a1
: 80a2ffff lb v0,-1(a1)
- : 1000ff6c b 121c <__dtoa+0x121c>
+ : 1000ff66 b 12a4 <__dtoa+0x1298>
: 01008025 move s0,t0
: a2220000 sb v0,0(s1)
: 82e2ffff lb v0,-1(s7)
: 26100001 addiu s0,s0,1
: 24420001 addiu v0,v0,1
- : 1000fbb4 b 354 <__dtoa+0x354>
+ : 1000fb99 b 388 <__dtoa+0x37c>
: a0820000 sb v0,0(a0)
: c7a00024 lwc1 $f0,36(sp)
+ : 00000000 nop
: c7a10020 lwc1 $f1,32(sp)
- : 1000fcb1 b 758 <__dtoa+0x758>
+ : 1000fc97 b 794 <__dtoa+0x788>
: 24080002 li t0,2
: 8fa20028 lw v0,40(sp)
: 00000000 nop
---
gcc --save-temps shows completely different ".set" usages
and it also comments out nops in inline case???
---
--- dtoa.s-save-temps-inline-rts 2023-11-14 01:44:51.063959690 +0900
+++ dtoa.s-save-temps-noinline-rts 2023-11-14 01:44:29.319827284 +0900
[...]
-$L5:
+$L7:
lwc1 $f0,36($sp)
- #nop
+ nop
lwc1 $f1,32($sp)
- #nop
+ nop
swc1 $f0,44($sp)
swc1 $f1,40($sp)
lwc1 $f2,44($sp)
mtc1 $0,$f0
lwc1 $f3,40($sp)
mtc1 $0,$f1
- #nop
+ nop
c.eq.d $f2,$f0
- #nop
- .set noreorder
- .set nomacro
- bc1t $L335
+ nop
+ bc1t $L336
slt $2,$20,2
- .set macro
- .set reorder
- bne $2,$0,$L9
- lw $2,0($3)
- #nop
- .set noreorder
- .set nomacro
- beq $2,$0,$L10
+ bne $2,$0,$L11
+ nop
+
+ lw $2,0($4)
+ nop
+ beq $2,$0,$L12
li $2,2 # 0x2
- .set macro
- .set reorder
- .set noreorder
- .set nomacro
- beq $20,$2,$L9
+ beq $20,$2,$L11
move $20,$0
- .set macro
- .set reorder
li $20,2 # 0x2
[...]
---
---
Izumi Tsutsui
From: Taylor R Campbell <riastradh@NetBSD.org>
To: gnats-bugs@netbsd.org
Cc: port-mips-maintainer@netbsd.org, gnats-admin@netbsd.org,
netbsd-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Tue, 14 Nov 2023 02:00:07 +0000
> Date: Tue, 14 Nov 2023 02:20:50 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> I wrote:
>
> > At least changing ${DESTDIR}/usr/include/mips/fenv.h from
> > >> static inline fpu_control_t
> > >> __rfs(void)
> > to
> > >> static __noinline fpu_control_t
> > >> __rfs(void)
> > also solves the problem, but asm outputs are completely different
> > in these two cases.
>
> It looks gcc (7.5.0 from NetBSD 9.3) -O2 drops some nops
> if __rfs() is defined as inline:
This is weird but it is not necessarily a problem. I checked some of
the diffs you quoted below, and they don't appear to use the register
being loaded until more than one instruction later, so there's no load
delay hazards even without the nops. For example:
> : c7a00024 lwc1 $f0,36(sp)
> + : 00000000 nop
> : c7a10020 lwc1 $f1,32(sp)
> + : 00000000 nop
> : e7a0002c swc1 $f0,44(sp)
> : e7a10028 swc1 $f1,40(sp)
Without the nops this is:
lwc1 $f0,36(sp)
lwc1 $f1,32(sp)
swc1 $f0,44(sp)
swc1 $f1,40(sp)
So the load and store of $f0 are separated by an instruction that
doesn't involve $f0, and similarly for $f1.
Do you see any nops there that appear to be needed?
It would be nice if we could isolate this to a smaller subroutine than
dtoa, which is gigantic. I tried something like this fragment but
didn't get anywhere reproducing an obvious problem:
void outofline(void);
inline unsigned
rfs_inline(void)
{
unsigned fpsr;
asm("cfc1 %0,$31" : "=r"(fpsr));
return fpsr;
}
__attribute__((noinline)) unsigned
rfs_noinline(void)
{
unsigned fpsr;
asm("cfc1 %0,$31" : "=r"(fpsr));
return fpsr;
}
double
foo(double *x, double *y, unsigned *z)
{
outofline();
*z = rfs_noinline();
return *x + *y;
}
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Wed, 15 Nov 2023 00:50:36 +0900
riastradh@ wrote:
> lwc1 $f0,36(sp)
> lwc1 $f1,32(sp)
> swc1 $f0,44(sp)
> swc1 $f1,40(sp)
>
> So the load and store of $f0 are separated by an instruction that
> doesn't involve $f0, and similarly for $f1.
>
> Do you see any nops there that appear to be needed?
I wonder how many nops are actually required for the FP coprocessor
(i.e. from/to a different chip) registers..
> It would be nice if we could isolate this to a smaller subroutine than
> dtoa, which is gigantic.
The following diff against dtoa.c reduces outputs a bit
(requires "DBG="-O2 -Wno-error=uninitialized -Wno-error=unused-variable
-Wno-error=unused-but-set-variable -Wno-error=maybe-uninitialized
-Wno-error=unused-label"):
---
Index: gdtoa/dtoa.c
===================================================================
RCS file: /cvsroot/src/lib/libc/gdtoa/dtoa.c,v
retrieving revision 1.10
diff -u -p -d -r1.10 dtoa.c
--- gdtoa/dtoa.c 16 May 2012 17:48:59 -0000 1.10
+++ gdtoa/dtoa.c 14 Nov 2023 15:41:55 -0000
@@ -148,6 +148,7 @@ dtoa
#endif /*}}*/
#endif /*}*/
+#if 0
#ifndef MULTIPLE_THREADS
if (dtoa_result) {
freedtoa(dtoa_result);
@@ -259,6 +260,7 @@ dtoa
denorm = 1;
}
#endif
+#endif
ds = (dval(&d2)-1.5)*0.289529654602168 + 0.1760912590558 + i*0.301029995663981;
k = (int)ds;
if (ds < 0. && ds != k)
@@ -331,6 +333,7 @@ dtoa
i = 1;
}
s = s0 = rv_alloc((size_t)i);
+#if 0
if (s == NULL)
return NULL;
@@ -838,5 +841,6 @@ dtoa
*decpt = k + 1;
if (rve)
*rve = s;
+#endif
return s0;
}
---
--- /tmp/dtoa-small-inline-rfs.s 2023-11-15 00:38:15.396489398 +0900
+++ /tmp/dtoa-small-noinline-rfs.s 2023-11-15 00:38:14.084341125 +0900
[...]
: 44831000 mtc1 v1,$f2
: c4800004 lwc1 $f0,4(a0)
: 00001025 move v0,zero
: 44821800 mtc1 v0,$f3
: c4810000 lwc1 $f1,0(a0)
: 8f820000 lw v0,0(gp)
: 46201001 sub.d $f0,$f2,$f0
: c4420004 lwc1 $f2,4(v0)
+ : 00000000 nop
: c4430000 lwc1 $f3,0(v0)
: 8f820000 lw v0,0(gp)
: 46220002 mul.d $f0,$f0,$f2
: c4420004 lwc1 $f2,4(v0)
+ : 00000000 nop
: c4430000 lwc1 $f3,0(v0)
+ : 00000000 nop
: 46220000 add.d $f0,$f0,$f2
: 44801000 mtc1 zero,$f2
+ : 00000000 nop
: 44801800 mtc1 zero,$f3
: 00000000 nop
: 46220000 add.d $f0,$f0,$f2
: 4622003c c.lt.d $f0,$f2
: 4442f800 cfc1 v0,$31
: 4442f800 cfc1 v0,$31
: 00000000 nop
: 34410003 ori at,v0,0x3
: 38210002 xori at,at,0x2
: 44c1f800 ctc1 at,$31
: 00000000 nop
: 462000a4 cvt.w.d $f2,$f0
: 44c2f800 ctc1 v0,$31
: 00000000 nop
: 44021000 mfc1 v0,$f2
- : 4501002b bc1t 140 <__dtoa+0x140>
+ : 4501002d bc1t 180 <__dtoa+0x174>
: 00000000 nop
: 2c430017 sltiu v1,v0,23
- : 10600010 beqz v1,e0 <__dtoa+0xe0>
+ : 10600010 beqz v1,118 <__dtoa+0x10c>
: 2cc3000a sltiu v1,a2,10
: 8f830000 lw v1,0(gp)
: 000220c0 sll a0,v0,0x3
: 00641821 addu v1,v1,a0
: 00002825 move a1,zero
: c4600004 lwc1 $f0,4(v1)
: 44851000 mtc1 a1,$f2
: 00002025 move a0,zero
: c4610000 lwc1 $f1,0(v1)
: 44841800 mtc1 a0,$f3
: 00000000 nop
: 4620103c c.lt.d $f2,$f0
: 00000000 nop
[...]
---
Izumi Tsutsui
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Tue, 14 Nov 2023 16:01:14 +0000
> Date: Wed, 15 Nov 2023 00:50:36 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> I wonder how many nops are actually required for the FP coprocessor
> (i.e. from/to a different chip) registers..
According to the manual I found at
<https://cgi.cse.unsw.edu.au/~cs3231/doc/R3000.pdf#page=103>, only one
delay instruction is needed (bottom of p. 8-8):
The load operation has a delay of one clock, and (like loading to
an integer register) this is not interlocked. The compiler and/or
assembler will usually take care of this; but it is invalid for an
FP load to be immediately followed by an instruction using the
loaded value.
(I'm not saying this is absolutely true and applicable here -- just
sharing it as the only documentation I could find that looks like it
might be applicable.)
> > It would be nice if we could isolate this to a smaller subroutine than
> > dtoa, which is gigantic.
>
> The following diff against dtoa.c reduces outputs a bit
> (requires "DBG="-O2 -Wno-error=uninitialized -Wno-error=unused-variable
> -Wno-error=unused-but-set-variable -Wno-error=maybe-uninitialized
> -Wno-error=unused-label"):
Just to be clear: Do you mean that (a) the diff to the .s files shows
the difference between non-working printf (without the nops) and
working printf (with the nops), and (b) there's nothing else different
between non-working vs working printf? Or did I misunderstand?
Wasn't there a difference about inline vs non-inline __rfs, which
should presumably affect where the cfc1 instruction is?
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Wed, 15 Nov 2023 02:02:30 +0900
riastradh@ wrote:
> > I wonder how many nops are actually required for the FP coprocessor
> > (i.e. from/to a different chip) registers..
>
> According to the manual I found at
> <https://cgi.cse.unsw.edu.au/~cs3231/doc/R3000.pdf#page=103>, only one
> delay instruction is needed (bottom of p. 8-8):
>
> The load operation has a delay of one clock, and (like loading to
> an integer register) this is not interlocked. The compiler and/or
> assembler will usually take care of this; but it is invalid for an
> FP load to be immediately followed by an instruction using the
> loaded value.
>
> (I'm not saying this is absolutely true and applicable here -- just
> sharing it as the only documentation I could find that looks like it
> might be applicable.)
I've checked "MIPS RISC architecture" by Kane Gerry (Japanese edition)
https://www.amazon.co.jp/dp/4320025989
and it says more scheduling is necessary right after LWC1, MTC1, and CTC1,
but I don't understand details.. (and a bit hard to translate to English)
> > The following diff against dtoa.c reduces outputs a bit
> > (requires "DBG="-O2 -Wno-error=uninitialized -Wno-error=unused-variable
> > -Wno-error=unused-but-set-variable -Wno-error=maybe-uninitialized
> > -Wno-error=unused-label"):
>
> Just to be clear: Do you mean that (a) the diff to the .s files shows
> the difference between non-working printf (without the nops) and
> working printf (with the nops), and (b) there's nothing else different
> between non-working vs working printf? Or did I misunderstand?
In my previous mail,
- dtoa-small-inline-rfs.s is 'objdump -dz' output from dtoa.pico
built with two #if 0/#endif pairs and the original <mips/fenv.h>
- dtoa-small-noinline-rfs.s is 'objdump -dz' output from dtoa.pico
built with two #if 0/endif pairs and patched <mips/fenv.h>
that added "static __noinline" to __rfs()
I've put full asm sources (i.e. no #if 0/#endif pair) by
objdump -dz (address numbers are manually deleted):
https://gist.github.com/tsutsui/85b03f26aa1bfd3fdd884bce8fd8c1e7
- dtoa-inline-rfs.s
dtoa.pico built from the original libc source, i.e. non-working printf
- dtoa-noinline-rfs.s
dtoa.pico built with __noinline __rfs in <mips/fenv.h>, working printf
- dtoa-inline-noinline-rfs.diff
diff between the above two .s files
- fenv.h.diff
__noinline __rfs() diff used on building dtoa-noinline-rfs.s
I'd say the answers of your two questions both (a) and (b) are "yes".
> Wasn't there a difference about inline vs non-inline __rfs, which
> should presumably affect where the cfc1 instruction is?
It looks the differences of nops after lwc1 are not relevant to
cfc1 used in __rfs().
---
Izumi Tsutsui
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Tue, 14 Nov 2023 21:48:20 +0000
> Date: Wed, 15 Nov 2023 02:02:30 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> I've checked "MIPS RISC architecture" by Kane Gerry (Japanese edition)
> https://www.amazon.co.jp/dp/4320025989
> and it says more scheduling is necessary right after LWC1, MTC1, and CTC1,
> but I don't understand details.. (and a bit hard to translate to English)
I found a copy of the English book in the Internet Archive:
https://archive.org/details/mips-risc-architecture-2nd-ed/page/n231/mode/2up
In Table 8-6 `Floating-Point Operation Latencies', for R2010 and R3010
(though not R3000 -- not listed) it says:
LWC1 2(a)
...
CTC1 2(a)
CFC1 2
The footnote reads:
(a) Software /must/ schedule operations to avoid reading the
floating-point register that is the target of a floating-point
load or move to floating-point unit instruction less than two
instructions later, and must schedule a floating-point branch
instruction two ore more instructions after a floating-point
compare instruction.
I read this to mean that a load into a float register must be
separated by a single other instruction (like a nop) from any use of
that float register, which would therefore be no less than two
instructions later.
But this phrasing is not very clear. It _could_ mean that there must
be two instructions separating the load and the use.
> > Wasn't there a difference about inline vs non-inline __rfs, which
> > should presumably affect where the cfc1 instruction is?
>
> It looks the differences of nops after lwc1 are not relevant to
> cfc1 used in __rfs().
It sounds like there are two separate parts to the differences between
generated code in the working and non-working libc:
(a) inline __rfs including cfc1, vs out-of-line call to __rfs, and
(b) nops in lwc1 delay slots.
Both changes are _triggered_ by putting `inline' vs `__noinline' on
the definition in the source code, but I'm talking about the
differences in the generated code, not the differences in the source
code.
If you take the _non-working_ intermediate .s file with inline __rfs
in the source code, and insert nops where the _working_ one has nops
after lwc1, and then assemble and link it all, does that result work?
Something else to try: assert that fegetround() returned FE_TONEAREST.
Nothing is linked against libm in your test cases, so nothing should
be changing the rounding mode, right? So it should always return
FE_TONEAREST. If the assertion fails, that will suggest the machine
state is set up in correctly or we're misusing cfc1 somehow; if the
assertion passes, perhaps the __rfs/cfc1/fegetround business is a red
herring, and it's actually a problem with some other part of the code
(or with the compiler's code generation).
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Wed, 15 Nov 2023 18:58:49 +0900
riastradh@ wrote:
> > > Wasn't there a difference about inline vs non-inline __rfs, which
> > > should presumably affect where the cfc1 instruction is?
> >
> > It looks the differences of nops after lwc1 are not relevant to
> > cfc1 used in __rfs().
>
> It sounds like there are two separate parts to the differences between
> generated code in the working and non-working libc:
>
> (a) inline __rfs including cfc1, vs out-of-line call to __rfs, and
> (b) nops in lwc1 delay slots.
Yes.
> Both changes are _triggered_ by putting `inline' vs `__noinline' on
> the definition in the source code, but I'm talking about the
> differences in the generated code, not the differences in the source
> code.
Ok.
> If you take the _non-working_ intermediate .s file with inline __rfs
> in the source code, and insert nops where the _working_ one has nops
> after lwc1, and then assemble and link it all, does that result work?
I've added intermidiate .s files by --save-temps to gist:
- https://gist.github.com/tsutsui/85b03f26aa1bfd3fdd884bce8fd8c1e7#file-dtoa-save-temps-inline-s
dtoa.s by 'gcc --save-temps' from the original libc source,
i.e. non-working printf
- https://gist.github.com/tsutsui/85b03f26aa1bfd3fdd884bce8fd8c1e7#file-dtoa-save-temps-noinline-s
dtoa.s by 'gcc --save-temps' with __noinline __rfs in <mips/fenv.h>,
working printf
- https://gist.github.com/tsutsui/85b03f26aa1bfd3fdd884bce8fd8c1e7#file-dtoa-save-temps-s-diff
diff between the above two --save-temps .s files
It looks:
- the inline version uses ".set reorder" by default and it puts
".set noreorder" and ".set nomacro" around branch instructions
(to handle branch delay slot?)
- the inline version also put '#nop' (commented out nop) after
lwc1 instructions (not confirmed where this comes from)
- the noinline version uses ".set noreorder" by default and
put 'nop' (without '#') after lwc1 instructions
It looks there are something wrong in mips gcc?
> Something else to try: assert that fegetround() returned FE_TONEAREST.
> Nothing is linked against libm in your test cases, so nothing should
> be changing the rounding mode, right? So it should always return
> FE_TONEAREST. If the assertion fails, that will suggest the machine
> state is set up in correctly or we're misusing cfc1 somehow; if the
> assertion passes, perhaps the __rfs/cfc1/fegetround business is a red
> herring, and it's actually a problem with some other part of the code
> (or with the compiler's code generation).
A simple printf shows Rounding=1 so the fegetround() in dtoa.c should
return FE_TONEAREST, as expected.
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Wed, 15 Nov 2023 23:30:45 +0900
> > If you take the _non-working_ intermediate .s file with inline __rfs
> > in the source code, and insert nops where the _working_ one has nops
> > after lwc1, and then assemble and link it all, does that result work?
>
> I've added intermidiate .s files by --save-temps to gist:
>
> - https://gist.github.com/tsutsui/85b03f26aa1bfd3fdd884bce8fd8c1e7#file-dtoa-save-temps-inline-s
> dtoa.s by 'gcc --save-temps' from the original libc source,
> i.e. non-working printf
>
> - https://gist.github.com/tsutsui/85b03f26aa1bfd3fdd884bce8fd8c1e7#file-dtoa-save-temps-noinline-s
> dtoa.s by 'gcc --save-temps' with __noinline __rfs in <mips/fenv.h>,
> working printf
>
> - https://gist.github.com/tsutsui/85b03f26aa1bfd3fdd884bce8fd8c1e7#file-dtoa-save-temps-s-diff
> diff between the above two --save-temps .s files
>
> It looks:
> - the inline version uses ".set reorder" by default and it puts
> ".set noreorder" and ".set nomacro" around branch instructions
> (to handle branch delay slot?)
>
> - the inline version also put '#nop' (commented out nop) after
> lwc1 instructions (not confirmed where this comes from)
This '#nop' comes from src/external/gpl3/gcc/dist/gcc/config/mips/mips.md:
https://github.com/NetBSD/src/blob/netbsd-9/external/gpl3/gcc/dist/gcc/config/mips/mips.md#L7176-L7186
---
;; Like nop, but commented out when outside a .set noreorder block.
(define_insn "hazard_nop"
[(const_int 1)]
""
{
if (mips_noreorder.nesting_level > 0)
return "nop";
else
return "#nop";
}
[(set_attr "type" "nop")])
---
I rebuild gcc with the following diff and printf test problem works
as expected:
---
Index: external/gpl3/gcc/dist/gcc/config/mips/mips.md
===================================================================
RCS file: /cvsroot/src/external/gpl3/gcc/dist/gcc/config/mips/mips.md,v
retrieving revision 1.1.1.6
diff -u -p -d -r1.1.1.6 mips.md
--- external/gpl3/gcc/dist/gcc/config/mips/mips.md 19 Jan 2019 10:14:39 -0000 1.1.1.6
+++ external/gpl3/gcc/dist/gcc/config/mips/mips.md 15 Nov 2023 14:25:41 -0000
@@ -7181,7 +7181,7 @@
if (mips_noreorder.nesting_level > 0)
return "nop";
else
- return "#nop";
+ return "nop";
}
[(set_attr "type" "nop")])
---
Actually dtoa.pico has nops as __noinline __rfs() case:
---
ac: 3c027ff0 lui v0,0x7ff0
b0: 02021824 and v1,s0,v0
b4: 106200d3 beq v1,v0,404 <__dtoa+0x3f8>
b8: ac800000 sw zero,0(a0)
bc: c7a00024 lwc1 $f0,36(sp)
c0: 00000000 nop
c4: c7a10020 lwc1 $f1,32(sp)
c8: 00000000 nop
cc: e7a0002c swc1 $f0,44(sp)
d0: e7a10028 swc1 $f1,40(sp)
d4: c7a2002c lwc1 $f2,44(sp)
d8: 44800000 mtc1 zero,$f0
dc: c7a30028 lwc1 $f3,40(sp)
---
However, IIUC if ".set reorder" is specified in as sources,
gas(1) should have responsibilities to insert necessary nops
to avoid hazards?
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Thu, 16 Nov 2023 00:18:16 +0900
I wrote:
> However, IIUC if ".set reorder" is specified in as sources,
> gas(1) should have responsibilities to insert necessary nops
> to avoid hazards?
As I wrote before gas from binutils 2.31.1 in netbsd-9 doesn't
put any nop after lwc1 on assembling .s source by --save-temps:
---
: 3c027ff0 lui v0,0x7ff0
: 02022024 and a0,s0,v0
: 108200cb beq a0,v0,3d0 <__dtoa+0x3d0>
: ac600000 sw zero,0(v1)
: c7a00024 lwc1 $f0,36(sp)
: c7a10020 lwc1 $f1,32(sp)
: e7a0002c swc1 $f0,44(sp)
: e7a10028 swc1 $f1,40(sp)
: c7a2002c lwc1 $f2,44(sp)
: 44800000 mtc1 zero,$f0
: c7a30028 lwc1 $f3,40(sp)
: 44800800 mtc1 zero,$f1
: 00000000 nop
: 46201032 c.eq.d $f2,$f0
: 00000000 nop
: 45010120 bc1t 558 <__dtoa+0x558>
---
On the other hand, gas from binutils 2.16.1 in netbsd-5 seems to put
necessary(?) nop after lwc1 on assembling the same .s source:
---
: 3c027ff0 lui v0,0x7ff0
: 02022024 and a0,s0,v0
: 108200ce beq a0,v0,3dc <__dtoa+0x3dc>
: ac600000 sw zero,0(v1)
: c7a00024 lwc1 $f0,36(sp)
: c7a10020 lwc1 $f1,32(sp)
===> : 00000000 nop
: e7a0002c swc1 $f0,44(sp)
: e7a10028 swc1 $f1,40(sp)
: c7a2002c lwc1 $f2,44(sp)
: 44800000 mtc1 zero,$f0
: c7a30028 lwc1 $f3,40(sp)
: 44800800 mtc1 zero,$f1
: 00000000 nop
: 46201032 c.eq.d $f2,$f0
: 00000000 nop
: 45010123 bc1t 568 <__dtoa+0x568>
---
---
Izumi Tsutsui
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Wed, 15 Nov 2023 16:30:20 +0000
> Date: Wed, 15 Nov 2023 23:30:45 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> However, IIUC if ".set reorder" is specified in as sources,
> gas(1) should have responsibilities to insert necessary nops
> to avoid hazards?
Does it insert the nops? Can you see with objdump whether the
commented-out `#nop' in the .s intermediate temp file appears as a
real nop instruction in the .o file?
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Wed, 15 Nov 2023 16:35:49 +0000
> Date: Thu, 16 Nov 2023 00:18:16 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> On the other hand, gas from binutils 2.16.1 in netbsd-5 seems to put
> necessary(?) nop after lwc1 on assembling the same .s source:
> ...
> : c7a00024 lwc1 $f0,36(sp)
> : c7a10020 lwc1 $f1,32(sp)
> ===> : 00000000 nop
> : e7a0002c swc1 $f0,44(sp)
> : e7a10028 swc1 $f1,40(sp)
Interesting. Does this one nop make the difference? If you assemble
the .s file without it, and assemble the .s file with it added, does
that make the difference of whether printf works correctly or not?
If this nop does make the difference, that suggests to me that my
interpretation of the CPU references we found was wrong -- that the
load must be separated by _two_ instructions from any use of the
register, not by just one.
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Thu, 16 Nov 2023 02:29:17 +0900
> > However, IIUC if ".set reorder" is specified in as sources,
> > gas(1) should have responsibilities to insert necessary nops
> > to avoid hazards?
>
> Does it insert the nops? Can you see with objdump whether the
> commented-out `#nop' in the .s intermediate temp file appears as a
> real nop instruction in the .o file?
The commented-out `#nop' in the .s is actually ignored by as(1).
It looks as(1) itself will determine if more instructions
(including nop) are necessary if reorder case:
https://github.com/NetBSD/src/blob/trunk/external/gpl3/binutils/dist/gas/config/tc-mips.c#L6414-L6560
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: riastradh@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Thu, 16 Nov 2023 02:48:29 +0900
> > On the other hand, gas from binutils 2.16.1 in netbsd-5 seems to put
> > necessary(?) nop after lwc1 on assembling the same .s source:
> > ...
> > : c7a00024 lwc1 $f0,36(sp)
> > : c7a10020 lwc1 $f1,32(sp)
> > ===> : 00000000 nop
> > : e7a0002c swc1 $f0,44(sp)
> > : e7a10028 swc1 $f1,40(sp)
>
> Interesting. Does this one nop make the difference? If you assemble
> the .s file without it, and assemble the .s file with it added, does
> that make the difference of whether printf works correctly or not?
>
> If this nop does make the difference, that suggests to me that my
> interpretation of the CPU references we found was wrong -- that the
> load must be separated by _two_ instructions from any use of the
> register, not by just one.
The above nop doesn't change the wrong behavior.
After several try and errors, the following two nops
added to intermidiate dtoa.s file solve problems in
my first test program:
---
--- obj.newsmips/dtoa.s.orig 2023-11-16 02:07:46.447381521 +0900
+++ obj.newsmips/dtoa.s 2023-11-16 02:24:46.673588550 +0900
@@ -223,17 +223,17 @@
lw $2,%got(__tens_D2A)($28)
sll $3,$16,3
addu $2,$2,$3
lwc1 $f0,4($2)
lwc1 $f2,36($sp)
lwc1 $f1,0($2)
lwc1 $f3,32($sp)
- #nop
+ nop
c.lt.d $f2,$f0
#nop
bc1f $L314
subu $22,$22,$4
addiu $19,$22,-1
addiu $16,$16,-1
.set noreorder
.set nomacro
@@ -2367,17 +2367,17 @@
.set macro
.set reorder
lw $5,%got($LC9)($28)
#nop
lwc1 $f8,%lo($LC9+4)($5)
#nop
lwc1 $f9,%lo($LC9)($5)
- #nop
+ nop
$L63:
mul.d $f0,$f0,$f8
addiu $5,$23,1
trunc.w.d $f4,$f0,$2
mfc1 $2,$f4
cvt.d.w $f4,$f4
sub.d $f0,$f0,$f4
addiu $2,$2,48
---
news3470-% env LD_LIBRARY_PATH=/s/netbsd-9/src/lib/libc/obj.newsmips ldd ./a.out
./a.out:
-lc.12 => /s/netbsd-9/src/lib/libc/obj.newsmips/libc.so.12
[build libc using original dtoa.s]
news3470-% env LD_LIBRARY_PATH=/s/netbsd-9/src/lib/libc/obj.newsmips ./a.out
300.0
314
?00.0
1570
[build libc from dtoa.s with the first nop]
news3470-% env LD_LIBRARY_PATH=/s/netbsd-9/src/lib/libc/obj.newsmips ./a.out
300.0
314
1000.0
1570
[build libc from dtoa.s with both nops]
news3470-% env LD_LIBRARY_PATH=/s/netbsd-9/src/lib/libc/obj.newsmips ./a.out
314.2
314
1570.8
1570
news3470-%
---
It looks both $f2/$f3 and $f8/$f9 FP register pairs are used as double,
so as(1) should handle more hazard such case (double that requires
two FP registers)?
---
Izumi Tsutsui
From: Taylor R Campbell <riastradh@NetBSD.org>
To: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Wed, 15 Nov 2023 18:10:54 +0000
> Date: Thu, 16 Nov 2023 02:48:29 +0900
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
>
> lwc1 $f0,4($2)
> lwc1 $f2,36($sp)
> lwc1 $f1,0($2)
> lwc1 $f3,32($sp)
> - #nop
> + nop
> c.lt.d $f2,$f0
> ...
> lwc1 $f8,%lo($LC9+4)($5)
> #nop
> lwc1 $f9,%lo($LC9)($5)
> - #nop
> + nop
> $L63:
> mul.d $f0,$f0,$f8
>
> It looks both $f2/$f3 and $f8/$f9 FP register pairs are used as double,
> so as(1) should handle more hazard such case (double that requires
> two FP registers)?
Yes, that sounds likely: lwc1 only loads one 32-bit quantity at a
time, but c.lt.d and mul.d operate on two consecutive 32-bit registers
to form a 64-bit double for each of their two input operands.
Time to file a gas bug, I guess!
From: Taylor R Campbell <campbell@mumble.net>
To: Taylor R Campbell <riastradh@NetBSD.org>
Cc: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>, gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Thu, 16 Nov 2023 02:28:09 +0000
gas/config/tc-mips.c has the following fragment which looks like it
should handle this case:
else if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE))
|| (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELA=
Y)))
{
/* Handle cases where INSN1 writes to a known general coprocessor
register. There must be a one instruction delay before INSN2
if INSN2 reads that register, otherwise no delay is needed. */
mask =3D fpr_write_mask (insn1);
if (mask !=3D 0)
{
if (!insn2 || (mask & fpr_read_mask (insn2)) !=3D 0)
return 1;
}
However, if I use mipseb--netbsd-as from a newsmips tooldir to
assemble the following fragment, a nop is inserted between the lw and
add but not between the lwc1 and add.d:
.set reorder
good: lw $a0,0($sp)
add $a1,$a0,$a0
bad: lwc1 $f1,0($sp)
lwc1 $f0,4($sp)
add.d $f2,$f0,$f0
Examining the output with objdump reveals:
00000000 <good>:
0: 8fa40000 lw a0,0(sp)
4: 00000000 nop
8: 00842820 add a1,a0,a0
0000000c <bad>:
c: c7a10000 lwc1 $f1,0(sp)
10: c7a00004 lwc1 $f0,4(sp)
14: 46200080 add.d $f2,$f0,$f0
Cursory examination of the rest of tc-mips.c and mips-opc.c suggests
that the lwc1 instructions ought to have INSN_COPROC_MEMORY_DELAY set,
and both fpr_write_mask for the lwc1 and fpr_read_mask for the add.d
ought to include $f0/$f1. But I haven't tried putting debug messages
into gas to determine this conclusively.
So it looks like this isn't just a matter of failing to recognize the
dual-register business for double floating-point operations
(fpr_read/write_mask appear to have logic for that), but rather,
something is going awry with inserting nops in delay slots for lwc1
altogether.
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: campbell@mumble.net
Cc: riastradh@NetBSD.org, gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Thu, 16 Nov 2023 21:58:41 +0900
> gas/config/tc-mips.c has the following fragment which looks like it
> should handle this case:
:
> Cursory examination of the rest of tc-mips.c and mips-opc.c suggests
> that the lwc1 instructions ought to have INSN_COPROC_MEMORY_DELAY set,
> and both fpr_write_mask for the lwc1 and fpr_read_mask for the add.d
> ought to include $f0/$f1.
Yes, the following lines may intend to check double register accesses:
https://github.com/NetBSD/src/blob/b720a91/external/gpl3/binutils/dist/gas/config/tc-mips.c#L4835-L4839
---
/* Conservatively treat all operands to an FP_D instruction are doubles.
(This is overly pessimistic for things like cvt.s.d.) */
if (FPR_SIZE != 64 && (pinfo & FP_D))
mask |= mask << 1;
return mask;
---
I've also checked gas fron netbsd-7, 8, and 9
(all of them have the similar fpr_read_mask() function),
and it turns out binutils 2.32.2 from netbsd-7 inserts proper nops
but 2.27 from netbsd-8 and 2.31.1 from netbsd-9 don't:
---
% cat delay.s
.set reorder
good: lw $a0,0($sp)
add $a1,$a0,$a0
bad: lwc1 $f1,0($sp)
lwc1 $f0,4($sp)
add.d $f2,$f0,$f0
% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-as -v
GNU assembler version 2.31.1 (mipseb--netbsd) using BFD version (NetBSD Binutils nb1) 2.31.1
% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-as -o delay9.o delay.s
% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-objdump -dz delay9.o
delay9.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <good>:
0: 8fa40000 lw a0,0(sp)
4: 00000000 nop
8: 00842820 add a1,a0,a0
0000000c <bad>:
c: c7a10000 lwc1 $f1,0(sp)
10: c7a00004 lwc1 $f0,4(sp)
14: 46200080 add.d $f2,$f0,$f0
18: 00000000 nop
1c: 00000000 nop
% /s/netbsd-8/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-as -v
GNU assembler version 2.27 (mipseb--netbsd) using BFD version (NetBSD Binutils nb1) 2.27
% /s/netbsd-8/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-as -o delay8.o delay.s
% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-objdump -dz delay8.o
delay8.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <good>:
0: 8fa40000 lw a0,0(sp)
4: 00000000 nop
8: 00842820 add a1,a0,a0
0000000c <bad>:
c: c7a10000 lwc1 $f1,0(sp)
10: c7a00004 lwc1 $f0,4(sp)
14: 46200080 add.d $f2,$f0,$f0
18: 00000000 nop
1c: 00000000 nop
% /s/netbsd-7/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-as -v
GNU assembler version 2.23.2 (mipseb--netbsd) using BFD version (NetBSD Binutils nb1) 2.23.2
% /s/netbsd-7/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-as -o delay7.o delay.s
% /s/netbsd-9/src/obj.newsmips/tooldir.NetBSD-9.3-i386/bin/mipseb--netbsd-objdump -dz delay7.o
delay7.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <good>:
0: 8fa40000 lw a0,0(sp)
4: 00000000 nop
8: 00842820 add a1,a0,a0
0000000c <bad>:
c: c7a10000 lwc1 $f1,0(sp)
10: c7a00004 lwc1 $f0,4(sp)
14: 00000000 nop
18: 46200080 add.d $f2,$f0,$f0
1c: 00000000 nop
%
---
I'll check binutils diff between netbsd-7 and 8.
---
Izumi Tsutsui
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: campbell@mumble.net
Cc: riastradh@NetBSD.org, gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Thu, 16 Nov 2023 23:40:07 +0900
I wrote:
> I'll check binutils diff between netbsd-7 and 8.
Okay, I think I've got it.
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvsroot/src/external/gpl3/binutils/dist/gas/config/tc-mips.c,v
retrieving revision 1.21
diff -u -p -d -U 20 -r1.21 tc-mips.c
--- gas/config/tc-mips.c 7 Nov 2018 01:13:53 -0000 1.21
+++ gas/config/tc-mips.c 16 Nov 2023 14:18:10 -0000
@@ -6423,42 +6423,42 @@ insns_between (const struct mips_cl_insn
if (!HAVE_CODE_COMPRESSION)
{
/* Check for GPR or coprocessor load delays. All such delays
are on the RT register. */
/* Itbl support may require additional care here. */
if ((!gpr_interlocks && (pinfo1 & INSN_LOAD_MEMORY))
|| (!cop_interlocks && (pinfo1 & INSN_LOAD_COPROC)))
{
if (insn2 == NULL || (gpr_read_mask (insn2) & gpr_write_mask (insn1)))
return 1;
}
/* Check for generic coprocessor hazards.
This case is not handled very well. There is no special
knowledge of CP0 handling, and the coprocessors other than
the floating point unit are not distinguished at all. */
/* Itbl support may require additional care here. FIXME!
Need to modify this to include knowledge about
user specified delays! */
- else if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE))
- || (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELAY)))
+ if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE))
+ || (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELAY)))
{
/* Handle cases where INSN1 writes to a known general coprocessor
register. There must be a one instruction delay before INSN2
if INSN2 reads that register, otherwise no delay is needed. */
mask = fpr_write_mask (insn1);
if (mask != 0)
{
if (!insn2 || (mask & fpr_read_mask (insn2)) != 0)
return 1;
}
else
{
/* Read-after-write dependencies on the control registers
require a two-instruction gap. */
if ((pinfo1 & INSN_WRITE_COND_CODE)
&& (pinfo2 & INSN_READ_COND_CODE))
return 2;
/* We don't know exactly what INSN1 does. If INSN2 is
also a coprocessor instruction, assume there must be
---
The pinfo field has been changed between binutils 2.23.2 and 2.27.
After the change, INSN_LOAD_MEMORY can be defined both GPR and FPR.
Actually on binutils 2.27 pinfo of lwc1 is 01020811, i.e.
(FP_S|INSN_COPROC_MEMORY_DELAY|INSN_LOAD_MEMORY|INSN_READ_3|INSN_WRITE_1),
but tc-mips.c still uses "else if" after an INSN_LOAD_MEMORY check
against GPR as above.
---
Izumi Tsutsui
From: Simon Burge <simonb@NetBSD.org>
To: gnats-bugs@netbsd.org
Cc: port-mips-maintainer@netbsd.org, gnats-admin@netbsd.org,
netbsd-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Fri, 17 Nov 2023 16:47:13 +1100
Hi Tsutsui,
Izumi Tsutsui wrote:
> The following reply was made to PR port-mips/57680; it has been noted by=
GNATS.
>
> From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
> To: campbell@mumble.net
> Cc: riastradh@NetBSD.org, gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
> Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R300=
0mipseb
> Date: Thu, 16 Nov 2023 23:40:07 +0900
>
> I wrote:
> > I'll check binutils diff between netbsd-7 and 8.
> =
> Okay, I think I've got it.
> =
> Index: gas/config/tc-mips.c
> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
> RCS file: /cvsroot/src/external/gpl3/binutils/dist/gas/config/tc-mips.c=
,v
> retrieving revision 1.21
> diff -u -p -d -U 20 -r1.21 tc-mips.c
> --- gas/config/tc-mips.c 7 Nov 2018 01:13:53 -0000 1.21
> +++ gas/config/tc-mips.c 16 Nov 2023 14:18:10 -0000
> @@ -6423,42 +6423,42 @@ insns_between (const struct mips_cl_insn
> if (!HAVE_CODE_COMPRESSION)
> {
> /* Check for GPR or coprocessor load delays. All such delays
> are on the RT register. */
> /* Itbl support may require additional care here. */
> if ((!gpr_interlocks && (pinfo1 & INSN_LOAD_MEMORY))
> || (!cop_interlocks && (pinfo1 & INSN_LOAD_COPROC)))
> {
> if (insn2 =3D=3D NULL || (gpr_read_mask (insn2) & gpr_write_mask (i=
nsn1)))
> return 1;
> }
> =
> /* Check for generic coprocessor hazards.
> =
> This case is not handled very well. There is no special
> knowledge of CP0 handling, and the coprocessors other than
> the floating point unit are not distinguished at all. */
> /* Itbl support may require additional care here. FIXME!
> Need to modify this to include knowledge about
> user specified delays! */
> - else if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE))
> - || (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELAY)=
))
> + if ((!cop_interlocks && (pinfo1 & INSN_COPROC_MOVE))
> + || (!cop_mem_interlocks && (pinfo1 & INSN_COPROC_MEMORY_DELAY)))
> {
> =
> ---
> =
> The pinfo field has been changed between binutils 2.23.2 and 2.27.
> After the change, INSN_LOAD_MEMORY can be defined both GPR and FPR.
> Actually on binutils 2.27 pinfo of lwc1 is 01020811, i.e.
> (FP_S|INSN_COPROC_MEMORY_DELAY|INSN_LOAD_MEMORY|INSN_READ_3|INSN_WRITE_=
1),
> but tc-mips.c still uses "else if" after an INSN_LOAD_MEMORY check
> against GPR as above.
> =
> ---
Good catch! This seems to be correct from inspecting the above. Also
the code layout of:
if ....
{
...
}
/* big multi-line comments */
else if ....
{
...
}
doesn't help readability here.
I would guess that there's not much MIPS1 + FPU coverage with Linux.
It's likely that most 32-bit is things like OpenWRT that likely use
MIPS32 without an FPU.
Cheers,
Simon.
Responsible-Changed-From-To: port-mips-maintainer->tsutsui
Responsible-Changed-By: tsutsui@NetBSD.org
Responsible-Changed-When: Fri, 17 Nov 2023 15:36:47 +0000
Responsible-Changed-Why:
I'll handle this.
State-Changed-From-To: open->analyzed
State-Changed-By: tsutsui@NetBSD.org
State-Changed-When: Fri, 17 Nov 2023 15:36:47 +0000
State-Changed-Why:
Ten years old bug in gas.
From: Izumi Tsutsui <tsutsui@ceres.dti.ne.jp>
To: simonb@NetBSD.org
Cc: gnats-bugs@netbsd.org, tsutsui@ceres.dti.ne.jp
Subject: Re: port-mips/57680: printf("%.1f") shows wrong results on R3000mipseb
Date: Sat, 18 Nov 2023 00:34:58 +0900
simonb@ wrote:
> Good catch! This seems to be correct from inspecting the above.
Thanks. I've also filed a bug report to binutils bugzilla:
https://sourceware.org/bugzilla/show_bug.cgi?id=31072
I'll commit the fix and send pullup requests.
---
Izumi Tsutsui
From: "Izumi Tsutsui" <tsutsui@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: src/external/gpl3/binutils/dist/gas/config
Date: Fri, 17 Nov 2023 23:06:05 +0000
Module Name: src
Committed By: tsutsui
Date: Fri Nov 17 23:06:05 UTC 2023
Modified Files:
src/external/gpl3/binutils/dist/gas/config: tc-mips.c
Log Message:
binutils: fix gas that doesn't handle MIPS1 FPR load hazard correctly.
Fixes PR/57680.
Should be pulled up to netbsd-10, netbsd-9, and netbsd-8.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 \
src/external/gpl3/binutils/dist/gas/config/tc-mips.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: "Izumi Tsutsui" <tsutsui@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: src/external/gpl3/binutils.old/dist/gas/config
Date: Fri, 17 Nov 2023 23:08:27 +0000
Module Name: src
Committed By: tsutsui
Date: Fri Nov 17 23:08:27 UTC 2023
Modified Files:
src/external/gpl3/binutils.old/dist/gas/config: tc-mips.c
Log Message:
binutils.old: apply the same fix for mips gas from binutils.
> binutils: fix gas that doesn't handle MIPS1 FPR load hazard correctly.
> Fixes PR/57680.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 \
src/external/gpl3/binutils.old/dist/gas/config/tc-mips.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
State-Changed-From-To: analyzed->needs-pullups
State-Changed-By: riastradh@NetBSD.org
State-Changed-When: Mon, 20 Nov 2023 13:29:35 +0000
State-Changed-Why:
Looks like the fix is in and needs pullup-10, pullup-9, pullup-8?
State-Changed-From-To: needs-pullups->pending-pullups
State-Changed-By: tsutsui@NetBSD.org
State-Changed-When: Mon, 20 Nov 2023 18:50:08 +0000
State-Changed-Why:
[pullup-10 #469] [pullup-9 #1767] [pullup-8 #1919]
From: "Manuel Bouyer" <bouyer@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: [netbsd-10] src/external/gpl3
Date: Sun, 26 Nov 2023 12:35:26 +0000
Module Name: src
Committed By: bouyer
Date: Sun Nov 26 12:35:26 UTC 2023
Modified Files:
src/external/gpl3/binutils.old/dist/gas/config [netbsd-10]: tc-mips.c
src/external/gpl3/binutils/dist/gas/config [netbsd-10]: tc-mips.c
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #469):
external/gpl3/binutils/dist/gas/config/tc-mips.c: revision 1.25
external/gpl3/binutils.old/dist/gas/config/tc-mips.c: revision 1.8
binutils: fix gas that doesn't handle MIPS1 FPR load hazard correctly.
Fixes PR/57680.
Should be pulled up to netbsd-10, netbsd-9, and netbsd-8.
binutils.old: apply the same fix for mips gas from binutils.
binutils: fix gas that doesn't handle MIPS1 FPR load hazard correctly.
Fixes PR/57680.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.6.6.1 \
src/external/gpl3/binutils.old/dist/gas/config/tc-mips.c
cvs rdiff -u -r1.22 -r1.22.6.1 \
src/external/gpl3/binutils/dist/gas/config/tc-mips.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: "Martin Husemann" <martin@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: [netbsd-9] src/external/gpl3/binutils/dist/gas/config
Date: Mon, 27 Nov 2023 19:55:23 +0000
Module Name: src
Committed By: martin
Date: Mon Nov 27 19:55:23 UTC 2023
Modified Files:
src/external/gpl3/binutils/dist/gas/config [netbsd-9]: tc-mips.c
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1767):
external/gpl3/binutils/dist/gas/config/tc-mips.c: revision 1.25
binutils: fix gas that doesn't handle MIPS1 FPR load hazard correctly.
Fixes PR/57680.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.21.2.1 \
src/external/gpl3/binutils/dist/gas/config/tc-mips.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
From: "Martin Husemann" <martin@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc:
Subject: PR/57680 CVS commit: [netbsd-8] src/external/gpl3/binutils/dist/gas/config
Date: Mon, 27 Nov 2023 19:57:29 +0000
Module Name: src
Committed By: martin
Date: Mon Nov 27 19:57:29 UTC 2023
Modified Files:
src/external/gpl3/binutils/dist/gas/config [netbsd-8]: tc-mips.c
Log Message:
Pull up following revision(s) (requested by tsutsui in ticket #1919):
external/gpl3/binutils/dist/gas/config/tc-mips.c: revision 1.25
binutils: fix gas that doesn't handle MIPS1 FPR load hazard correctly.
Fixes PR/57680.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.19.6.1 \
src/external/gpl3/binutils/dist/gas/config/tc-mips.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
State-Changed-From-To: pending-pullups->closed
State-Changed-By: riastradh@NetBSD.org
State-Changed-When: Tue, 28 Nov 2023 01:48:49 +0000
State-Changed-Why:
fixed and pulled up to all branches
>Unformatted:
(Contact us)
$NetBSD: query-full-pr,v 1.47 2022/09/11 19:34:41 kim Exp $
$NetBSD: gnats_config.sh,v 1.9 2014/08/02 14:16:04 spz Exp $
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