NetBSD Problem Report #36995

From jmcneill@black.invisible.ca  Mon Sep 17 01:54:39 2007
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Date: Sun, 16 Sep 2007 21:50:51 -0400 (EDT)
From: jmcneill@invisible.ca
Reply-To: jmcneill@invisible.ca
To: gnats-bugs@NetBSD.org
Subject: ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo CPUs
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>Number:         36995
>Category:       kern
>Synopsis:       ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo CPUs
>Confidential:   no
>Severity:       critical
>Priority:       high
>Responsible:    kern-bug-people
>State:          closed
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Mon Sep 17 01:55:00 +0000 2007
>Closed-Date:    Tue Mar 22 09:59:14 +0000 2011
>Last-Modified:  Tue Mar 22 09:59:14 +0000 2011
>Originator:     jmcneill@invisible.ca
>Release:        NetBSD 4.99.30
>Organization:

>Environment:


System: NetBSD black.invisible.ca 4.99.30 NetBSD 4.99.30 (GENERIC) #47: Sun Sep 16 21:41:28 EDT 2007 jmcneill@black.invisible.ca:/export/home/jmcneill/branches/jmcneill-pm/src/sys/arch/amd64/compile/GENERIC amd64
Architecture: x86_64
Machine: amd64
>Description:
Later Core 2 Duo CPUs appear to have the ability to overclock
themselves using the enhanced speedstep API:

cpu0 at mainbus0 apid 0: (boot processor)
cpu0: Intel(R) Core(TM)2 Duo CPU     T7100  @ 1.80GHz, 1795.65 MHz
cpu0: features: bffbfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features: bffbfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,B20,DS,ACPI,MMX>
cpu0: features: bffbfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu0: features2: e3bd<SSE3,MONITOR,DS-CPL,VMX,EST,TM2,xTPR,PDCM>
cpu0: features3: bffbfbff<SYSCALL/SYSRET,XD,EM64T>
cpu0: L2 cache 2 MB 64B/line 8-way
cpu0: Enhanced SpeedStep (1420 mV) 2000 MHz
cpu0: unknown Enhanced SpeedStep CPU.
est_init_main: bus_clock = 20000
est_init_main: idlo = 0x617
est_init_main: lo  1068 mV, 1200 MHz
est_init_main: raw   23   ,    6    
est_init_main: idhi = 0xa2d
est_init_main: hi  1420 mV, 2000 MHz
est_init_main: raw   45   ,   10    
est_init_main: cur  = 0xa2d
est_init_main: fake entry 0: 1420 mV, 2000 MHz  MSR*100 mV = 1000 freq = 4500
est_init_main: fake entry 1: 1340 mV, 1800 MHz  MSR*100 mV =  900 freq = 3951
est_init_main: fake entry 2: 1260 mV, 1600 MHz  MSR*100 mV =  800 freq = 3402
est_init_main: fake entry 3: 1164 mV, 1400 MHz  MSR*100 mV =  700 freq = 2853
est_init_main: fake entry 4: 1084 mV, 1200 MHz  MSR*100 mV =  600 freq = 2304
cpu0: Enhanced SpeedStep frequencies available (MHz): 2000 1800 1600 1400 1200

machdep.est.frequency.target = 2000
machdep.est.frequency.current = 2000
machdep.est.frequency.available = 2000 1800 1600 1400 1200

Since both ENHANCED_SPEEDSTEP and sysutils/estd assume that the highest value
reported is the normal CPU speed, we erroneously overclock the CPU which
could cause serious hardware issues.

>How-To-Repeat:
Boot an i386 or amd64 kernel with a later Core 2 Duo that includes
options ENHANCED_SPEEDSTEP in the kernel.
>Fix:
Workaround: Drop machdep.est.frequency.target to a lower value at
startup, and do not run estd.
Proper fix: Unknown; is there a feature flag we can check when we calculate
est frequencies to ignore the highest value?

>Release-Note:

>Audit-Trail:
From: Quentin Garnier <cube@cubidou.net>
To: gnats-bugs@NetBSD.org
Cc: jmcneill@invisible.ca
Subject: Re: kern/36995: ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo CPUs
Date: Mon, 17 Sep 2007 08:11:44 +0200

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 On Mon, Sep 17, 2007 at 01:55:00AM +0000, jmcneill@invisible.ca wrote:
 > >Number:         36995
 > >Category:       kern
 > >Synopsis:       ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo CPUs
 > >Confidential:   no
 > >Severity:       critical
 > >Priority:       high
 > >Responsible:    kern-bug-people
 > >State:          open
 > >Class:          sw-bug
 > >Submitter-Id:   net
 > >Arrival-Date:   Mon Sep 17 01:55:00 +0000 2007
 > >Originator:     jmcneill@invisible.ca
 > >Release:        NetBSD 4.99.30
 > >Organization:
 > =09
 > >Environment:
 > =09
 > =09
 > System: NetBSD black.invisible.ca 4.99.30 NetBSD 4.99.30 (GENERIC) #47: S=
 un Sep 16 21:41:28 EDT 2007 jmcneill@black.invisible.ca:/export/home/jmcnei=
 ll/branches/jmcneill-pm/src/sys/arch/amd64/compile/GENERIC amd64
 > Architecture: x86_64
 > Machine: amd64
 > >Description:
 > Later Core 2 Duo CPUs appear to have the ability to overclock
 > themselves using the enhanced speedstep API:
 >=20
 > cpu0 at mainbus0 apid 0: (boot processor)
 > cpu0: Intel(R) Core(TM)2 Duo CPU     T7100  @ 1.80GHz, 1795.65 MHz
 > cpu0: features: bffbfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
 > cpu0: features: bffbfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,B20,DS,ACPI,MMX>
 > cpu0: features: bffbfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
 > cpu0: features2: e3bd<SSE3,MONITOR,DS-CPL,VMX,EST,TM2,xTPR,PDCM>
 > cpu0: features3: bffbfbff<SYSCALL/SYSRET,XD,EM64T>
 > cpu0: L2 cache 2 MB 64B/line 8-way
 > cpu0: Enhanced SpeedStep (1420 mV) 2000 MHz
 > cpu0: unknown Enhanced SpeedStep CPU.
 > est_init_main: bus_clock =3D 20000
 > est_init_main: idlo =3D 0x617
 > est_init_main: lo  1068 mV, 1200 MHz
 > est_init_main: raw   23   ,    6   =20
 > est_init_main: idhi =3D 0xa2d
 > est_init_main: hi  1420 mV, 2000 MHz
 > est_init_main: raw   45   ,   10   =20
 > est_init_main: cur  =3D 0xa2d
 > est_init_main: fake entry 0: 1420 mV, 2000 MHz  MSR*100 mV =3D 1000 freq =
 =3D 4500
 > est_init_main: fake entry 1: 1340 mV, 1800 MHz  MSR*100 mV =3D  900 freq =
 =3D 3951
 > est_init_main: fake entry 2: 1260 mV, 1600 MHz  MSR*100 mV =3D  800 freq =
 =3D 3402
 > est_init_main: fake entry 3: 1164 mV, 1400 MHz  MSR*100 mV =3D  700 freq =
 =3D 2853
 > est_init_main: fake entry 4: 1084 mV, 1200 MHz  MSR*100 mV =3D  600 freq =
 =3D 2304
 > cpu0: Enhanced SpeedStep frequencies available (MHz): 2000 1800 1600 1400=
  1200
 >=20
 > machdep.est.frequency.target =3D 2000
 > machdep.est.frequency.current =3D 2000
 > machdep.est.frequency.available =3D 2000 1800 1600 1400 1200
 >=20
 > Since both ENHANCED_SPEEDSTEP and sysutils/estd assume that the highest v=
 alue
 > reported is the normal CPU speed, we erroneously overclock the CPU which
 > could cause serious hardware issues.

 Do we really overclock the CPU?  I thought this was that feature that
 allows one core to be boosted if the other one is idle...  Can't
 remember the name...

 --=20
 Quentin Garnier - cube@cubidou.net - cube@NetBSD.org
 "You could have made it, spitting out benchmarks
 Owe it to yourself not to fail"
 Amplifico, Spitting Out Benchmarks, Hometakes Vol. 2, 2005.

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From: "Jared D. McNeill" <jmcneill@invisible.ca>
To: gnats-bugs@NetBSD.org
Cc: kern-bug-people@netbsd.org, gnats-admin@netbsd.org,
	netbsd-bugs@netbsd.org
Subject: Re: kern/36995: ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo
 CPUs
Date: Mon, 17 Sep 2007 06:21:03 -0400 (EDT)

 On Mon, 17 Sep 2007, Quentin Garnier wrote:
 > > machdep.est.frequency.target =3D 2000
 > > machdep.est.frequency.current =3D 2000
 > > machdep.est.frequency.available =3D 2000 1800 1600 1400 1200
 >
 > Do we really overclock the CPU?  I thought this was that feature that
 > allows one core to be boosted if the other one is idle...  Can't
 > remember the name...

 The sysctl output above is from a fresh boot, no estd -- and the T7100 in 
 this laptop is a 1.8GHz Core 2 Duo.

 Cheers,
 Jared

From: Alan Barrett <apb@cequrux.com>
To: gnats-bugs@NetBSD.org
Cc: netbsd-bugs@NetBSD.org
Subject: Re: kern/36995: ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo
	CPUs
Date: Mon, 17 Sep 2007 12:46:27 +0200

 On Mon, 17 Sep 2007, jmcneill@invisible.ca wrote:
 > Proper fix: Unknown; is there a feature flag we can check when we
 > calculate est frequencies to ignore the highest value?

 Even without a feature flag, it seems that we have enough information to
 detect this situation.  I'll highlight two items from your dmesg output:

 > cpu0: Intel(R) Core(TM)2 Duo CPU     T7100  @ 1.80GHz, 1795.65 MHz
                                                          ^^^^^^^^^^^

 > cpu0: Enhanced SpeedStep (1420 mV) 2000 MHz
                                      ^^^^^^^^

 --apb (Alan Barrett)

From: Quentin Garnier <cube@cubidou.net>
To: Alan Barrett <apb@cequrux.com>
Cc: gnats-bugs@NetBSD.org
Subject: Re: kern/36995: ENHANCED_SPEEDSTEP dangerous on newer Core 2 Duo  CPUs
Date: Mon, 17 Sep 2007 12:48:46 +0200

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 On Mon, Sep 17, 2007 at 12:46:27PM +0200, Alan Barrett wrote:
 > On Mon, 17 Sep 2007, jmcneill@invisible.ca wrote:
 > > Proper fix: Unknown; is there a feature flag we can check when we
 > > calculate est frequencies to ignore the highest value?
 >=20
 > Even without a feature flag, it seems that we have enough information to
 > detect this situation.  I'll highlight two items from your dmesg output:

 Not that easily.

 > > cpu0: Intel(R) Core(TM)2 Duo CPU     T7100  @ 1.80GHz, 1795.65 MHz
 >                                                          ^^^^^^^^^^^

 E.g., my laptop's BIOS can be configured to operate at minimum speed
 when powered on on battery.

 --=20
 Quentin Garnier - cube@cubidou.net - cube@NetBSD.org
 "You could have made it, spitting out benchmarks
 Owe it to yourself not to fail"
 Amplifico, Spitting Out Benchmarks, Hometakes Vol. 2, 2005.

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State-Changed-From-To: open->closed
State-Changed-By: jruoho@NetBSD.org
State-Changed-When: Tue, 22 Mar 2011 09:59:14 +0000
State-Changed-Why:

I will close this; the issues with est(4) are unlikely to be fixed at this
point. Please reopen if you think otherwise.

> Proper fix: Unknown; is there a feature flag we can check when we
> calculate est frequencies to ignore the highest value?

There is no proper way to fix this within est(4). Note also that the MSR
values should not be set blindly on new Intel CPUs; besides the target MHz   
values, there are also certain enable/disable flags within the same register.



>Unformatted:

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