NetBSD Problem Report #53654

From www@NetBSD.org  Sun Oct  7 04:09:32 2018
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	by mollari.NetBSD.org (Postfix) with ESMTPS id A751D7A154
	for <gnats-bugs@gnats.NetBSD.org>; Sun,  7 Oct 2018 04:09:32 +0000 (UTC)
Message-Id: <20181007040929.BAA1C7A279@mollari.NetBSD.org>
Date: Sun,  7 Oct 2018 04:09:29 +0000 (UTC)
From: nullnilaki@gmail.com
Reply-To: nullnilaki@gmail.com
To: gnats-bugs@NetBSD.org
Subject: Revive IP12(Indigo R3000) kernel on NetBSD/sgimips
X-Send-Pr-Version: www-1.0

>Number:         53654
>Category:       port-sgimips
>Synopsis:       Revive IP12(Indigo R3000) kernel on NetBSD/sgimips
>Confidential:   no
>Severity:       critical
>Priority:       low
>Responsible:    port-sgimips-maintainer
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Sun Oct 07 04:10:00 +0000 2018
>Originator:     Naruaki Etomi
>Release:        NetBSD 8.99.25 (GENERIC32_IP12)
>Organization:
>Environment:
NetBSD 8.99.25 (GENERIC32_IP12)
>Description:
IP12(Indigo R3000)kernel is broken since old NetBSD release.

>> hinv
              Memory size: 32 Mbytes
   Instruction cache size: 32 Kbytes
          Data cache size: 32 Kbytes
            System option: Audio processor, revision 10
                CPU board: IP12 33 MHz, with FPU

>> bootp()kernel
Obtaining kernel from server xserve
3341520+0+102384 entry: 0x80002000
>How-To-Repeat:

>Fix:
-----------------------------------------------------------------------------------

diff -Naru src.orig/sys/arch/sgimips/dev/zs.c src/sys/arch/sgimips/dev/zs.c
--- src.orig/sys/arch/sgimips/dev/zs.c	2015-02-19 03:03:08.000000000 +0000
+++ src/sys/arch/sgimips/dev/zs.c	2018-10-06 21:33:29.574136985 +0000
@@ -624,8 +624,16 @@
 		    		     mach_subtype == MACH_SGI_IP12_VIP12)) {
 			addr = (struct zsdevice *)
 						MIPS_PHYS_TO_KSEG1(0x1fb80d20);
-			break;
+		} else if (zs_unit == 0) {
+			addr = (struct zsdevice *)
+						MIPS_PHYS_TO_KSEG1(0x1fb80d00);
+		} else if (zs_unit == 1) {
+			addr = (struct zsdevice *)
+						MIPS_PHYS_TO_KSEG1(0x1fb80d10);
+		} else {
+			panic("zs_get_chan_addr: bad zs_unit %d\n", zs_unit);
 		}
+		break;

 		/* FALLTHROUGH */
 	case MACH_SGI_IP20:
diff -Naru src.orig/sys/arch/sgimips/hpc/hpcvar.h src/sys/arch/sgimips/hpc/hpcvar.h
--- src.orig/sys/arch/sgimips/hpc/hpcvar.h	2011-01-26 03:04:04.000000000 +0000
+++ src/sys/arch/sgimips/hpc/hpcvar.h	2018-10-06 23:01:29.799900981 +0000
@@ -98,19 +98,25 @@
         uint32_t	scsi_dmactl_reset;
 };

+/*
+ * Indigo R3K EEPROM size is 128 bytes.
+ * It defined include/sys/IP12nvram.h on IRIX.
+ * However 256 bytes is no problem at all.
+ */
+
 struct hpc_attach_args {
-	const char		*ha_name;	/* name of device */
-	bus_addr_t		ha_devoff;	/* offset of device */
-	bus_addr_t		ha_dmaoff;	/* offset of DMA regs */
-	int			ha_irq;		/* interrupt line */
-
-	bus_space_tag_t		ha_st;		/* HPC space tag */
-	bus_space_handle_t	ha_sh;		/* HPC space handle XXX */
-	bus_dma_tag_t		ha_dmat;	/* HPC DMA tag */
+        const char              *ha_name;       /* name of device */
+        bus_addr_t              ha_devoff;      /* offset of device */
+        bus_addr_t              ha_dmaoff;      /* offset of DMA regs */
+        int                     ha_irq;         /* interrupt line */
+
+        bus_space_tag_t         ha_st;          /* HPC space tag */
+        bus_space_handle_t      ha_sh;          /* HPC space handle XXX */
+        bus_dma_tag_t           ha_dmat;        /* HPC DMA tag */

-	struct hpc_values	*hpc_regs;	/* HPC register definitions */
+        struct hpc_values       *hpc_regs;      /* HPC register definitions */

-	uint8_t			hpc_eeprom[256];/* HPC eeprom contents */
+        uint8_t                 hpc_eeprom[256];/* HPC eeprom contents */
 };

 #endif	/* _ARCH_SGIMIPS_HPC_HPCVAR_H_ */
diff -Naru src.orig/sys/arch/sgimips/hpc/if_sq.c src/sys/arch/sgimips/hpc/if_sq.c
--- src.orig/sys/arch/sgimips/hpc/if_sq.c	2018-06-27 03:01:31.000000000 +0000
+++ src/sys/arch/sgimips/hpc/if_sq.c	2018-10-06 22:29:53.846826982 +0000
@@ -60,6 +60,7 @@
 #include <net/bpf.h>

 #include <sys/bus.h>
+#include <machine/machtype.h>
 #include <machine/intr.h>
 #include <machine/sysconf.h>

@@ -135,6 +136,7 @@

 /* MAC address offset for non-onboard implementations */
 #define SQ_HPC_EEPROM_ENADDR	250
+#define SQ_HPC_EEPROM_IP12_ENADDR    122

 #define SGI_OUI_0		0x08
 #define SGI_OUI_1		0x00
@@ -263,8 +265,26 @@
 		}
 	}

-	memcpy(sc->sc_enaddr, &haa->hpc_eeprom[SQ_HPC_EEPROM_ENADDR],
-	    ETHER_ADDR_LEN);
+	switch (mach_type) {
+	case MACH_SGI_IP6:
+	case MACH_SGI_IP12:
+		memcpy(sc->sc_enaddr, &haa->hpc_eeprom[SQ_HPC_EEPROM_IP12_ENADDR],
+	    	ETHER_ADDR_LEN);
+			/*
+	 		 * IP6 and IP12 machine don't have ARCBIOS.
+	 		*/
+			if (sc->sc_enaddr[0] != SGI_OUI_0 ||
+	    		sc->sc_enaddr[1] != SGI_OUI_1 ||
+	    		sc->sc_enaddr[2] != SGI_OUI_2) {
+				printf(": unable to get MAC address!\n");
+				goto fail_6;
+			}
+		break;
+	default:
+		memcpy(sc->sc_enaddr, &haa->hpc_eeprom[SQ_HPC_EEPROM_ENADDR],
+	    	ETHER_ADDR_LEN);
+		break;
+	}

 	/*
 	 * If our mac address is bogus, obtain it from ARCBIOS. This will
diff -Naru src.orig/sys/arch/sgimips/sgimips/arcemu.c src/sys/arch/sgimips/sgimips/arcemu.c
--- src.orig/sys/arch/sgimips/sgimips/arcemu.c	2018-02-09 03:01:14.000000000 +0000
+++ src/sys/arch/sgimips/sgimips/arcemu.c	2018-10-06 21:59:01.809792983 +0000
@@ -44,12 +44,11 @@
 #include <dev/arcbios/arcbios.h>
 #include <dev/arcbios/arcbiosvar.h>

-#include <dev/ic/wd33c93reg.h>
-
 #define _ARCEMU_PRIVATE
 #include <sgimips/sgimips/arcemu.h>
 #include <sgimips/dev/picreg.h>

+#if 0
 static struct consdev arcemu_cn = {
 	NULL,			/* probe */
 	NULL,			/* init */
@@ -62,6 +61,7 @@
 	NODEV,
 	CN_NORMAL,
 };
+#endif

 /*
  * Emulate various ARCBIOS functions on pre-ARCS sgimips
@@ -134,21 +134,25 @@
 arcemu_identify(void)
 {
 	int mach;
+	volatile uint8_t value;

 	/*
-	 * Try to write a value to one of IP12's pic(4) graphics DMA registers.
-	 * This is at the same location as four byte parity strobes on IP6,
-	 * which appear to always read 0.
+	 * Try to write a value to one of IP12's hpc(4) EEPROM/LED Control registers.
+	 * Tested only Indigo R3K(IP12)
+	 * arcemu.c,v 1.23 does not work...
 	 */
-	*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(0x1faa0000) = 0xdeadbeef;
-	DELAY(1000);
-	if (*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(0x1faa0000) == 0xdeadbeef)
+	value = *(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fb801bf);
+	ARCEMU_DELAY(1000);
+	/* Toggle green LED */
+	value ^= 0x01;
+	*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fb801bf) = value;
+	ARCEMU_DELAY(1000);
+
+	if (*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fb801bf) == value) {
 		mach = MACH_SGI_IP12;
-	else
+	} else {
 		mach = MACH_SGI_IP6;
-	*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(0x1faa0000) = 0;
-	(void)*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(0x1faa0000);
-
+	}
 	return (mach);
 }

@@ -174,8 +178,10 @@
 /* Prom Vectors */
 static void   (*sgi_prom_reset)(void) = (void *)MIPS_PHYS_TO_KSEG1(0x1fc00000);
 static void   (*sgi_prom_reinit)(void) =(void *)MIPS_PHYS_TO_KSEG1(0x1fc00018);
+#if 0
 static int    (*sgi_prom_printf)(const char *, ...) =
 					 (void *)MIPS_PHYS_TO_KSEG1(0x1fc00080);
+#endif

 /*
  * The following matches IP6's and IP12's NVRAM memory layout
@@ -221,11 +227,13 @@
  * EEPROM reading routines. IP6's wiring is sufficiently ugly and the routine
  * sufficiently small that we just roll our own, rather than contorting the MD
  * driver.
+ * Tested only Indigo R3K(IP12)
+ * arcemu.c,v 1.23 does not work...
  */
 static void
 eeprom_read(uint8_t *eeprom_buf, size_t len, int is_cs56,
-    void (*set_pre)(int), void (*set_cs)(int), void (*set_sk)(int),
-    int (*get_do)(void), void (*set_di)(int))
+    void (*set_pre)(int), void (*set_cs)(int), void (*set_ck)(int),
+    void (*set_do)(int), int (*get_di)(void))
 {
 	int i, j;

@@ -233,32 +241,31 @@
 		uint16_t instr = 0xc000 | (i << ((is_cs56) ? 5 : 7));
 		uint16_t bitword = 0;

-		set_di(0);
-		set_sk(0);
 		set_pre(0);
-		set_cs(0);
+		set_do(0);
+		set_ck(0);
 		set_cs(1);
-		set_sk(1);
+		set_ck(1);

 		for (j = 0; j < ((is_cs56) ? 11 : 9); j++) {
-			set_di(instr & 0x8000);
-			set_sk(0);
-			set_sk(1);
+			set_do(instr & 0x8000);
+			set_ck(0);
+			set_ck(1);
 			instr <<= 1;
 		}

-		set_di(0);
+		set_do(0);

 		for (j = 0; j < 17; j++) {
-			bitword = (bitword << 1) | get_do();
-			set_sk(0);
-			set_sk(1);
+			bitword = (bitword << 1) | get_di();
+			set_ck(0);
+			set_ck(1);
 		}

 		eeprom_buf[i * 2 + 0] = bitword >> 8;
 		eeprom_buf[i * 2 + 1] = bitword & 0xff;

-		set_sk(0);
+		set_ck(0);
 		set_cs(0);
 	}
 }
@@ -277,12 +284,12 @@
 	for (i = 1; i >= 0; i--) {
 		if (mach_type == (MACH_SGI_IP6 | MACH_SGI_IP10)) {
 			eeprom_read((uint8_t *)&nvram, sizeof(nvram), i,
-			    ip6_set_pre, ip6_set_cs, ip6_set_sk,
-			    ip6_get_do,  ip6_set_di);
+			    ip6_set_pre, ip6_set_cs, ip6_set_ck,
+			    ip6_set_do,  ip6_get_di);
 		} else {
 			eeprom_read((uint8_t *)&nvram, sizeof(nvram), i,
-			    ip12_set_pre, ip12_set_cs, ip12_set_sk,
-			    ip12_get_do,  ip12_set_di);
+			    ip12_set_pre, ip12_set_cs, ip12_set_ck,
+			    ip12_set_do,  ip12_get_di);
 		}

 		if (nvram.enaddr[0] == 0x08 && nvram.enaddr[1] == 0x00 &&
@@ -324,7 +331,9 @@
 	arcemu_v.PowerDown =		  (intptr_t)sgi_prom_reinit; 
 	arcemu_v.EnterInteractiveMode =   (intptr_t)sgi_prom_reinit;	

+#if 0
 	cn_tab = &arcemu_cn;
+#endif

 	arcemu_eeprom_read();

@@ -632,14 +641,17 @@
 	return (&am);
 }

+#if 0
 /*
- * If this breaks.. well.. then it breaks.
+ * arcemu_prom_putc is probably break down uarea.
+ * However, it is very helpful in mach_init debug... 
  */
 static void
 arcemu_prom_putc(dev_t dummy, int c)
 {
 	sgi_prom_printf("%c", c);
 }
+#endif

 /* Unimplemented Vector */
 static void
diff -Naru src.orig/sys/arch/sgimips/sgimips/arcemu.h src/sys/arch/sgimips/sgimips/arcemu.h
--- src.orig/sys/arch/sgimips/sgimips/arcemu.h	2016-07-08 03:01:08.000000000 +0000
+++ src/sys/arch/sgimips/sgimips/arcemu.h	2018-10-06 22:05:40.447090983 +0000
@@ -59,7 +59,10 @@
 static void *	arcemu_ip12_GetMemoryDescriptor(void *mem);

 static void	arcemu_eeprom_read(void);
+
+#if 0
 static void	arcemu_prom_putc(dev_t, int);
+#endif

 #define ARCEMU_ENVOK(_x) 			\
     (MIPS_PHYS_TO_KSEG1((_x)) >= 0xa0000000 &&	\
@@ -78,10 +81,21 @@
 #define ARCEMU_UNIMPL ((int32_t)(intptr_t)arcemu_unimpl)
 static void	arcemu_unimpl(void);

+/* sgimips/machdep.c/delay() is not available at this time. */
+/* Target is Personal IRIS R3000 36Mhz. */
+#define ARCEMU_DELAY(n)							\
+do {							\
+        register int __N = 18 * n;							\
+        do {							\
+                __asm("addiu %0,%1,-1" : "=r" (__N) : "0" (__N));							\
+        } while (__N > 0);							\
+} while (/* CONSTCOND */ 0)
+
 /*
  * EEPROM bit access functions.
  */

+/* XXX */
 static inline void
 ip6_set_pre(int raise)
 {
@@ -89,9 +103,10 @@
 		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) |= 0x10;
 	else
 		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) &= ~0x10;
-	DELAY(4);
+	ARCEMU_DELAY(4);
 }

+/* EEPROM CHIP SELECT */
 static inline void
 ip6_set_cs(int raise)
 {
@@ -99,88 +114,95 @@
 		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) |= 0x20;
 	else
 		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) &= ~0x20;
-	DELAY(4);
+	ARCEMU_DELAY(4);
 }

+/* CLOCK */
 static inline void
-ip6_set_sk(int raise)
+ip6_set_ck(int raise)
 {
 	if (raise)
 		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) |= 0x40;
 	else
 		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f8e0000) &= ~0x40;
-	DELAY(4);
+	ARCEMU_DELAY(4);
+}
+
+/* CPU -> EEPROM */
+static inline void
+ip6_set_do(int raise)
+{
+	if (raise)
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) |= 0x01;
+	else
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) &= ~0x01;
+	ARCEMU_DELAY(4);
 }

+/* EEPROM -> CPU */
 static inline int
-ip6_get_do(void)
+ip6_get_di(void)
 {
-	DELAY(4);
-	if (*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1f800001) & 0x01)
+	ARCEMU_DELAY(4);
+	if (*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) & 0x0100)
 		return (1);
 	return (0);
 }

+/* XXX */
 static inline void
-ip6_set_di(int raise)
+ip12_set_pre(int raise)
 {
-	if (raise)	
-		*(volatile uint16_t *)MIPS_PHYS_TO_KSEG1(0x1f880002) |= 0x0100;
+	if (raise)
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) |= 0x01;
 	else
-		*(volatile uint16_t *)MIPS_PHYS_TO_KSEG1(0x1f880002) &= ~0x0100;
-	DELAY(4);
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) &= ~0x01;
+	ARCEMU_DELAY(4);
 }

+/* EEPROM CHIP SELECT */
 static inline void
-ip12_set_pre(int raise)
+ip12_set_cs(int raise)
 {
 	if (raise)
-		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) |= 0x01;
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) |= 0x02;
 	else
-		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) &= ~0x01;
-	DELAY(4);
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) &= ~0x02;
+	ARCEMU_DELAY(4);
 }

+/* CLOCK */
 static inline void
-ip12_set_cs(int raise)
+ip12_set_ck(int raise)
 {
 	if (raise)
-		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) |= 0x02;
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) |= 0x04;
 	else
-		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) &= ~0x02;
-	DELAY(4);
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) &= ~0x04;
+	ARCEMU_DELAY(4);
 }

+/* CPU -> EEPROM */
 static inline void
-ip12_set_sk(int raise)
+ip12_set_do(int raise)
 {
 	if (raise)
-		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) |= 0x04;
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) |= 0x08;
 	else
-		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) &= ~0x04;
-	DELAY(4);
+		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) &= ~0x08;
+	ARCEMU_DELAY(4);
 }

+/* EEPROM -> CPU */
 static inline int
-ip12_get_do(void)
+ip12_get_di(void)
 {
-	DELAY(4);
-	if (*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) & 0x08)
+	ARCEMU_DELAY(4);
+	if (*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1FB801BF) & 0x10)
 		return (1);
 	return (0);
 }

-static inline void
-ip12_set_di(int raise)
-{
-	if (raise)	
-		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) |= 0x10;
-	else
-		*(volatile uint8_t *)MIPS_PHYS_TO_KSEG1(0x1fbd0000) &= ~0x10;
-	DELAY(4);
-}
-
-
 #endif /* _ARCEMU_PRIVATE */

 #endif /* _ARCEMU_H_ */
diff -Naru src.orig/sys/dev/arcbios/arcbios_calls.S src/sys/dev/arcbios/arcbios_calls.S
--- src.orig/sys/dev/arcbios/arcbios_calls.S	2011-02-20 08:02:46.000000000 +0000
+++ src/sys/dev/arcbios/arcbios_calls.S	2018-10-06 22:25:23.037894982 +0000
@@ -32,6 +32,12 @@

 #include "assym.h"

+#if defined(MIPS1)
+#define	NOP_L		nop
+#else
+#define	NOP_L		/* nothing */
+#endif
+
 RCSID("$NetBSD: arcbios_calls.S,v 1.1 2011/02/20 08:02:46 matt Exp $")

 	.text
@@ -55,6 +61,7 @@
 	REG_S	s0, CALLFRAME_S0(sp)

 	PTR_L	t9, _C_LABEL(ARCBIOS)
+	NOP_L                                   # load delay
 	PTR_ADDU t9, t0
 	INT_L	t9, 0(t9)
 	nop
@@ -96,6 +103,7 @@
 #endif

 	PTR_L	t9, _C_LABEL(ARCBIOS)
+	NOP_L                                   # load delay
 	PTR_ADDU t9, t0
 	INT_L	t9, 0(t9)
 	nop

-----------------------------------------------------------------------------------

>> bootp()kernel
Obtaining kernel from server xserve
3245520+0+98272 entry: 0x80002000
[   1.0000000] Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
[   1.0000000]     2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017,
[   1.0000000]     2018 The NetBSD Foundation, Inc.  All rights reserved.
[   1.0000000] Copyright (c) 1982, 1986, 1989, 1991, 1993
[   1.0000000]     The Regents of the University of California.  All rights reserved.

[   1.0000000] NetBSD 8.99.25 (GENERIC32_IP12) #0: Sun Oct  7 00:47:57 UTC 2018
[   1.0000000] 	naruaki@:/usr/obj.sgimips/sys/arch/sgimips/compile/GENERIC32_IP12
[   1.0000000] total memory = 32768 KB
[   1.0000000] (0 reserved for ARCS)
[   1.0000000] avail memory = 28744 KB
[   1.0000000] WARNING: module error: sequencer: can't find builtin dependency `midi'
[   1.0000000] mainbus0 (root): SGI-IP12 [SGI, IP12], 1 processor
[   1.0000000] cpu0 at mainbus0: MIPS R3000A CPU (0x230) Rev. 3.0 with MIPS R3010 FPC Rev. 4.0
[   1.0000000] cpu0: 32KB/4B direct-mapped Instruction cache, 64 TLB entries
[   1.0000000] cpu0: 32KB/4B direct-mapped write-through Data cache
[   1.0000000] int0 at mainbus0 addr 0x1fb801c0
[   1.0000050] pic0 at mainbus0 addr 0x1fa00000
[   1.0000050] pic0: Revision B: dblk (0x2), iblk (0x8)
[   1.0000050] pic0: Indigo R3000, board revision 1
[   1.0000050] pic0: cache disabled, store partial, bus drive
[   1.0000050] gio0 at pic0
[   1.0000050] light0 at gio0: SGI LG2 (board revision 2)
[   1.0000050] wsdisplay0 at light0 kbdmux 1
[   1.0000050] hpc0 at gio0: SGI HPC1.5 (onboard)
[   1.0000050] zsc0 at hpc0 offset 0xd10
[   1.0000050] zstty0 at zsc0 channel 1 (console i/o)
[   1.0000050] zstty1 at zsc0 channel 0
[   1.0000050] zsc1 at hpc0 offset 0xd00
[   1.0000050] zsms0 at zsc1 channel 1: baud rate 4800
[   1.0000050] wsmouse0 at zsms0 mux 0
[   1.0000050] zskbd0 at zsc1 channel 0: baud rate 600
[   1.0000050] wskbd0 at zskbd0 mux 1
[   1.0000050] sq0 at hpc0 offset 0x100: SGI Seeq 8003
[   1.0000050] sq0: Ethernet address 08:00:69:06:59:03
[   1.0000050] wdsc0 at hpc0 offset 0x11f: WD33C93B (20.0 MHz clock, BURST DMA, SCSI ID 0)
[   1.0000050] wdsc0: microcode revision 0x0c, Fast SCSI
[   1.0000050] scsibus0 at wdsc0: 8 targets, 8 luns per target
[   1.0000050] dpclock0 at mainbus0 addr 0x1fb80e00
[   1.7853010] scsibus0: waiting 2 seconds for devices to settle...
[   2.3753010] WARNING: module error: sequencer: can't find builtin dependency `midi'
[   5.6852450] boot device: sq0
[   5.7222850] root on sq0
[   5.7515330] nfs_boot: trying DHCP/BOOTP
[   9.3352690] nfs_boot: DHCP next-server: 0.0.0.0
[   9.3852370] nfs_boot: my_addr=192.168.1.9
[   9.4333330] nfs_boot: my_mask=255.255.255.0
[   9.4835330] nfs_boot: gateway=192.168.1.1
[  12.5352690] nfs_boot: missing options (need IP, netmask, gateway, next-server, root-path)
[  12.6295010] nfs_boot: trying RARP (and RPC/bootparam)
[  25.6852370] revarp failed, error=51
[  25.7223010] Supported file systems: mfs ffs nfs procfs kernfs tmpfs ptyfs msdos efs cd9660
[  25.8195330] no file system for sq0
[  25.8603170] cannot mount root, error = 79
[  25.9105330] root device (default sq0): 

-----------------------------------------------------------------------------------

Tested on Indigo R3000 and Indigo R4000.
I don't have Personal IRIS. :-(

Discussed with Frank Scheiner who is the owner of an Indigo R3000(early lot).
http://mail-index.netbsd.org/port-sgimips/2018/08/thread1.html#000748
I'm so grateful for all your help, Frank!

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