NetBSD Problem Report #59299

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Date: Wed, 16 Apr 2025 00:17:19 +0000 (UTC)
From: campbell+netbsd@mumble.net
Reply-To: campbell+netbsd@mumble.net
To: gnats-bugs@NetBSD.org
Subject: Support Intel AMX CPU state (TILECFG/TILEDATA)
X-Send-Pr-Version: www-1.0

>Number:         59299
>Category:       port-amd64
>Synopsis:       Support Intel AMX CPU state (TILECFG/TILEDATA)
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    port-amd64-maintainer
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Wed Apr 16 00:20:00 +0000 2025
>Last-Modified:  Thu Apr 24 01:55:09 +0000 2025
>Originator:     Taylor R Campbell
>Release:        current
>Organization:
The TileCFG Foundation
>Environment:
>Description:
Intel AMX (Advanced Matrix Extensions) extends the CPU state with:

- a 64-byte TILECFG register
- an 8192-byte TILEDATA register

which a new set of tile computation instructions operate on.  These registers function similarly to the xmm/ymm/zmm extended SIMD registers -- they are saved and restored with XSAVE/XRSTOR, support for them is indicated in CPUID[EAX=0x0d, ECX=0] and other information is reported in other CPUID[EAX=0x0d, ECX=...] outputs, and access to them is controlled via XCR0 bits.

With the patches for

PR kern/57661: Crash when booting on Xeon Silver 4416+ in KVM/Qemu
https://gnats.netbsd.org/57661

we can save and restore the AMX state naively, but we should also expose them to ptrace(2) for debuggers.
>How-To-Repeat:
do matrixy stuff, I dunno
>Fix:
1. Define XSAVE_* numbers for TILECFG and TILEDATA.
2. Extend `struct xstate' (NetBSD software representation of the XSAVE area with fixed offsets) with TILECFG and TILEDATA components.
3. At boot-time, compute the smallest size of `struct xstate' prefix that fits all the XSAVE_* components supported by both the hardware and the software, say x86_xstate_size.
4. Change sizeof(struct xstate) to x86_xstate_size in various places, and use kmem_zalloc(x86_xstate_size, KM_SLEEP) instead of stack-allocated struct xstate objects (now that they're well over 10 KiB).
5. Add automatic tests of ptrace access to TILECFG/TILEDATA, which can be run on new enough CPUs.
6. Make sure gdb knows what to do.
7. Go back after all this work and discover that Intel has totally deprecated AMX and decided to ditch it like it did a few years ago with MPX.

>Audit-Trail:
From: "Taylor R Campbell" <riastradh@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc: 
Subject: PR/59299 CVS commit: src/sys/arch/x86/include
Date: Thu, 24 Apr 2025 01:51:43 +0000

 Module Name:	src
 Committed By:	riastradh
 Date:		Thu Apr 24 01:51:43 UTC 2025

 Modified Files:
 	src/sys/arch/x86/include: specialreg.h

 Log Message:
 amd64: Enable TILECFG and TILEDATA registers.

 This allows processes to use the registers, and NetBSD will save and
 restore them in context switches.  But it does not expose them to
 ptrace(2) or debuggers like all the other extended CPU state
 (xmm/ymm/zmm) -- that will require more work.

 PR kern/57661: Crash when booting on Xeon Silver 4416+ in KVM/Qemu
 PR port-amd64/59299: Support Intel AMX CPU state (TILECFG/TILEDATA)


 To generate a diff of this commit:
 cvs rdiff -u -r1.217 -r1.218 src/sys/arch/x86/include/specialreg.h

 Please note that diffs are not public domain; they are subject to the
 copyright notices on the relevant files.

From: "Taylor R Campbell" <riastradh@netbsd.org>
To: gnats-bugs@gnats.NetBSD.org
Cc: 
Subject: PR/59299 CVS commit: src/sys/arch/x86/x86
Date: Thu, 24 Apr 2025 01:52:03 +0000

 Module Name:	src
 Committed By:	riastradh
 Date:		Thu Apr 24 01:52:03 UTC 2025

 Modified Files:
 	src/sys/arch/x86/x86: identcpu.c

 Log Message:
 x86/identcpu.c: Sort includes.

 No functional change intended.

 Preparation for:

 PR port-amd64/59299: Support Intel AMX CPU state (TILECFG/TILEDATA)


 To generate a diff of this commit:
 cvs rdiff -u -r1.135 -r1.136 src/sys/arch/x86/x86/identcpu.c

 Please note that diffs are not public domain; they are subject to the
 copyright notices on the relevant files.

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