NetBSD Problem Report #60819

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Date: Mon, 28 Sep 2026 17:58:21 +0000 (UTC)
From: arcata@gmail.com
Reply-To: arcata@gmail.com
To: gnats-bugs@NetBSD.org
Subject: arm32_kernel_vm_init unconditionally reads pfr1 if CPU_ARM11 or CPU_ARMV7 is enabled alongside CPU_ARM9
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X-From4GNATS: "arcata@gmail.com via gnats" <gnats-admin@NetBSD.org>

>Number:         60819
>Category:       kern
>Synopsis:       arm32_kernel_vm_init unconditionally reads pfr1 if CPU_ARM11 or CPU_ARMV7 is enabled alongside CPU_ARM9
>Confidential:   no
>Severity:       serious
>Priority:       medium
>Responsible:    kern-bug-people
>State:          open
>Class:          sw-bug
>Submitter-Id:   net
>Arrival-Date:   Mon Sep 28 18:00:01 +0000 2026
>Last-Modified:  Mon Sep 28 19:05:00 +0000 2026
>Originator:     Joe Groff
>Release:        11.0-STABLE
>Organization:
>Environment:
>Description:
The evbarm INTEGRATOR_CP kernel configuration is set up out of the box to support CPU_ARM9, CPU_ARM10, and CPU_ARM11. However, this causes this block of code in arm32_kernel_vm_init to take the ARM11 path and attempt to read the pfr1 control register, which will trap on ARM9 because it doesn't exist there:

```
#ifdef ARM_HAS_VBAR
	const bool map_vectors_p = false;
#elif defined(CPU_ARMV7) || defined(CPU_ARM11)
	const bool map_vectors_p = vectors == ARM_VECTORS_HIGH
	    || (armreg_pfr1_read() & ARM_PFR1_SEC_MASK) == 0;
#else
	const bool map_vectors_p = true;
#endif
```

If CPU_ARM9, ARM9E, or ARM10 is enabled alongside ARM11 or ARMV7, then there should be a conditional check before reading `pfr1`.
>How-To-Repeat:
- Build the kernel with `./build.sh -m evbarm -a earmv5 kernel=INTEGRATOR_CP`.

- Boot the kernel in qemu with something like `qemu-system-arm -machine integratorcp -cpu arm926 -nographic -kernel ../path/to/INTEGRATOR_CP/netbsd`.

The boot will stop quickly after the initial `booting evbarm ...` message.
>Fix:

>Audit-Trail:
From: Yuri Honegger <yuri.honegger@icloud.com>
To: "gnats-bugs@netbsd.org" <gnats-bugs@NetBSD.org>
Cc: 
Subject: Re: kern/60819
Date: Mon, 28 Sep 2026 20:53:09 +0200

 Per my understanding, you=E2=80=99re only supposed to have one CPU_ARM* =
 definition per config.=20

 In general, each configurations only support one arm architecture level. =
 INTEGRATOR_CP is a bit special in that is is a simulator target, so =
 swapping out CPU cores is possible. The current NetBSD is not built for =
 supporting multiple architecture level at the same time. Even if we fix =
 this particular issue, just by searching "defined(CPU_ARM" you can find =
 many similar issues like the one you reported.

 How I read the INTEGRATOR_CP cpu options is that you are probably =
 supposed to comment out the ones you are not using. We should probably =
 describe that a bit more explicitly though.

 Would you mind testing ARM9 with the higher CPU_ARMX commented out =
 before I commit such a hint?

From: Joe Groff <arcata@gmail.com>
To: gnats-bugs@netbsd.org
Cc: kern-bug-people@netbsd.org, gnats-admin@netbsd.org, netbsd-bugs@netbsd.org
Subject: Re: kern/60819
Date: Mon, 28 Sep 2026 12:04:22 -0700

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 On Mon, Sep 28, 2026 at 11:55=E2=80=AFAM Yuri Honegger via gnats <
 gnats-admin@netbsd.org> wrote:

 > The following reply was made to PR kern/60819; it has been noted by GNATS=
 .
 >
 > From: Yuri Honegger <yuri.honegger@icloud.com>
 > To: "gnats-bugs@netbsd.org" <gnats-bugs@NetBSD.org>
 > Cc:
 > Subject: Re: kern/60819
 > Date: Mon, 28 Sep 2026 20:53:09 +0200
 >
 >  Per my understanding, you=3DE2=3D80=3D99re only supposed to have one CPU=
 _ARM* =3D
 >  definition per config.=3D20
 >
 >  In general, each configurations only support one arm architecture level.=
  =3D
 >  INTEGRATOR_CP is a bit special in that is is a simulator target, so =3D
 >  swapping out CPU cores is possible. The current NetBSD is not built for =
 =3D
 >  supporting multiple architecture level at the same time. Even if we fix =
 =3D
 >  this particular issue, just by searching "defined(CPU_ARM" you can find =
 =3D
 >  many similar issues like the one you reported.
 >
 >  How I read the INTEGRATOR_CP cpu options is that you are probably =3D
 >  supposed to comment out the ones you are not using. We should probably =
 =3D
 >  describe that a bit more explicitly though.
 >
 >  Would you mind testing ARM9 with the higher CPU_ARMX commented out =3D
 >  before I commit such a hint?


 Thanks for the quick reply, Yuri! I can confirm that the kernel works fine
 built with only CPU_ARM9 enabled. If it's intended that only one CPU_ARM*
 be enabled at once, that makes sense. I wonder if it would make sense for
 the build system to assert that so it's clear that the config needs to be
 modified.

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 <div dir=3D"ltr"><div dir=3D"ltr"><br></div><br><div class=3D"gmail_quote g=
 mail_quote_container"><div dir=3D"ltr" class=3D"gmail_attr">On Mon, Sep 28,=
  2026 at 11:55=E2=80=AFAM Yuri Honegger via gnats &lt;<a href=3D"mailto:gna=
 ts-admin@netbsd.org">gnats-admin@netbsd.org</a>&gt; wrote:<br></div><blockq=
 uote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-left:1p=
 x solid rgb(204,204,204);padding-left:1ex">The following reply was made to =
 PR kern/60819; it has been noted by GNATS.<br>
 <br>
 From: Yuri Honegger &lt;<a href=3D"mailto:yuri.honegger@icloud.com" target=
 =3D"_blank">yuri.honegger@icloud.com</a>&gt;<br>
 To: &quot;<a href=3D"mailto:gnats-bugs@netbsd.org" target=3D"_blank">gnats-=
 bugs@netbsd.org</a>&quot; &lt;gnats-bugs@NetBSD.org&gt;<br>
 Cc: <br>
 Subject: Re: kern/60819<br>
 Date: Mon, 28 Sep 2026 20:53:09 +0200<br>
 <br>
 =C2=A0Per my understanding, you=3DE2=3D80=3D99re only supposed to have one =
 CPU_ARM* =3D<br>
 =C2=A0definition per config.=3D20<br>
 <br>
 =C2=A0In general, each configurations only support one arm architecture lev=
 el. =3D<br>
 =C2=A0INTEGRATOR_CP is a bit special in that is is a simulator target, so =
 =3D<br>
 =C2=A0swapping out CPU cores is possible. The current NetBSD is not built f=
 or =3D<br>
 =C2=A0supporting multiple architecture level at the same time. Even if we f=
 ix =3D<br>
 =C2=A0this particular issue, just by searching &quot;defined(CPU_ARM&quot; =
 you can find =3D<br>
 =C2=A0many similar issues like the one you reported.<br>
 <br>
 =C2=A0How I read the INTEGRATOR_CP cpu options is that you are probably =3D=
 <br>
 =C2=A0supposed to comment out the ones you are not using. We should probabl=
 y =3D<br>
 =C2=A0describe that a bit more explicitly though.<br>
 <br>
 =C2=A0Would you mind testing ARM9 with the higher CPU_ARMX commented out =
 =3D<br>
 =C2=A0before I commit such a hint?</blockquote><div><br></div><div>Thanks f=
 or the quick reply, Yuri! I can confirm that the kernel works fine built wi=
 th only CPU_ARM9 enabled. If it&#39;s intended that only one CPU_ARM* be en=
 abled at once, that makes sense. I wonder if it would make sense for the bu=
 ild system to assert that so it&#39;s clear that the config needs to be mod=
 ified.</div></div></div>

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